Building EWOD microfluidic array technology on top of foundry CMOS

IET Seminar Digest

Volumn 2006, Issue 11367, 2006, Pages 23-30

  Li, Y ^a   Li, P ^a   Kazantzis, A ^a   Haworth, L I ^a   Muir, K ^a   Ross, A W S ^a   Terry, J G ^a   Stevenson, J T M ^a   Gundlach, A M ^a   Bunting, A ^a   Walton, A J ^a  

^a UNIVERSITY OF EDINBURGH   (United Kingdom)

Author keywords

CMOS; Electrowetting; Post processing

Indexed keywords

CHIP DESIGN; CMOS; CMOS PROCESS; CONTROL ELECTRODE; DIELECTRIC THICKNESS; DRIVE VOLTAGE; DROPLET MOTION; DROPLET SIZES; ELECTRODE ARRAYS; ELECTROWETTING; ELECTROWETTING ON DIELECTRICS; FOUNDRY TECHNOLOGY; HIGH VOLTAGE; LIQUID DROPLETS; MICROFLUIDIC ARRAY; MICROFLUIDIC PACKAGING; ON CHIPS; POST-PROCESSING;

ACTUATORS; CHIP SCALE PACKAGES; DIELECTRIC DEVICES; ELECTRODES; FOUNDRY PRACTICE; MEMS; MICROELECTROMECHANICAL DEVICES; MICROELECTRONICS; MICROSENSORS;

DROP FORMATION;

EID: 67649964416     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1049/ic:20060442     Document Type: Conference Paper

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