An efficient configuration unit design for VLIW based reconfigurable processors

IEEE INMIC 2008: 12th IEEE International Multitopic Conference - Conference Proceedings

Volumn , Issue , 2008, Pages 47-52

  Iqbal, M Aqeel ^a   Awan, Uzma Saeed ^b  

^a FOUNDATION UNIVERSITY   (Pakistan)

^b INTERNATIONAL ISLAMIC UNIVERSITY   (Pakistan)

Author keywords

Conjigurable logic blocks; Field programmable gate arrays; Multi port conjiguration memory; Reconjigurable logic; Reconjigurable processors

Indexed keywords

CONFIGURATION STREAM; CONJIGURABLE LOGIC BLOCKS; EFFICIENT DESIGNS; MULTI-PORT CONJIGURATION MEMORY; OPTIMAL CONFIGURATIONS; RECONFIGURABLE ARCHITECTURE; RECONFIGURABLE COMPUTING; RECONFIGURABLE COMPUTING SYSTEMS; RECONFIGURABLE PLAT-FORMS; RECONFIGURABLE PROCESSORS; RECONJIGURABLE LOGIC; RECONJIGURABLE PROCESSORS; RESEARCH PAPERS; ROLE MODEL; SYSTEM CONFIGURATIONS; UNIT DESIGN;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); LOGIC GATES; RESEARCH; VERY LONG INSTRUCTION WORD ARCHITECTURE;

DESIGN;

EID: 67649651882     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/INMIC.2008.4777706     Document Type: Conference Paper

References (10)

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