An efficient folded architecture for lifting-based discrete wavelet transform

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 56, Issue 4, 2009, Pages 290-294

  Shi, Guangming ^a   Liu, Weifeng ^a   Zhang, Liu ^a   Li, Fu ^a  

^a XIDIAN UNIVERSITY   (China)

Author keywords

Discrete wavelet transform (DWT); Folded architecture; Lifting scheme; Parallel; Pipeline

Indexed keywords

DISCRETE WAVELET TRANSFORMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PIPELINES; WAVELET ANALYSIS;

FIELD-PROGRAMMABLE GATE ARRAY IMPLEMENTATIONS; FOLDED ARCHITECTURES; HARDWARE IMPLEMENTATIONS; LIFTING SCHEMES; LIFTING-BASED DISCRETE WAVELET TRANSFORMS; OPTIMIZED ARCHITECTURES; PARALLEL; PROPOSED ARCHITECTURES;

SIGNAL RECONSTRUCTION;

EID: 67349086100     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2009.2015393     Document Type: Article

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