Integration of hardware assertions in systems-on-chip

Proceedings - International Test Conference

Volumn , Issue , 2008, Pages

  Geuzebroek, Jeroen ^a   Vermeulen, Bart ^a  

^a NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ADDITIONAL LOGIC; AREA COST; BUS PROTOCOL; INDUSTRIAL TESTS; ON CHIPS; POST-SILICON DEBUG; SYSTEMS ON CHIPS; TRACE INFRASTRUCTURE;

PROGRAMMABLE LOGIC CONTROLLERS;

EID: 67249118052     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.2008.4700593     Document Type: Conference Paper

References (24)

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