High-speed fault classification in power lines: Theory and FPGA-based implementation

IEEE Transactions on Industrial Electronics

Volumn 56, Issue 5, 2009, Pages 1793-1800

  Valsan, Simi P ^a   Swarup, K Shanti ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY MADRAS   (India)

Author keywords

Circuit faults; Fault classification; Field programmable gate arrays; Field programmable gate array (FPGA) implementation; Multiresolution analysis; Power system transients; Transforms; Transient analysis; Transmission line protection; Wavelet transform; Wavelet transforms

Indexed keywords

CIRCUIT FAULTS; FAULT CLASSIFICATION; FIELD-PROGRAMMABLE GATE ARRAY (FPGA) IMPLEMENTATION; POWER SYSTEM TRANSIENTS; TRANSFORMS; TRANSMISSION LINE PROTECTION;

BANDPASS FILTERS; COMPUTATIONAL EFFICIENCY; COMPUTER HARDWARE DESCRIPTION LANGUAGES; ELECTRIC FAULT LOCATION; ELECTRIC LINES; ELECTRIC POWER SYSTEM PROTECTION; ELECTRIC POWER TRANSMISSION NETWORKS; FAULT DETECTION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUITS; LOGIC GATES; MATHEMATICAL TRANSFORMATIONS; MATLAB; POWER TRANSMISSION; TRANSIENT ANALYSIS; TRANSMISSION LINE THEORY;

MULTIRESOLUTION ANALYSIS;

EID: 66149092769     PISSN: 02780046     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIE.2008.2011055     Document Type: Article

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