Three-dimensional integration technology and integrated systems

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2009, Pages 409-415

  Koyanagi, Mitsumasa ^a   Fukushima, Takafumi ^a   Tanaka, Tetsu ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

3-D INTEGRATIONS; ARTIFICIAL RETINA CHIPS; CHIP INTEGRATIONS; INTEGRATED SYSTEMS; INTEGRATION TECHNOLOGIES; MICROPROCESSOR TESTS; MULTI CHIPS; PARALLEL IMAGE PROCESSING; RE-CONFIGURABLE; SELF-ASSEMBLY TECHNIQUES; SHARED MEMORIES; THREE-DIMENSIONAL INTEGRATIONS; THROUGH SILICON VIAS; WAFER-TO-WAFER BONDINGS;

BONDING; COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; IMAGE PROCESSING; PARALLEL ALGORITHMS; SEMICONDUCTING SILICON COMPOUNDS; SILICON WAFERS; TECHNOLOGY; THREE DIMENSIONAL;

WAFER BONDING;

EID: 64549097598     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2009.4796515     Document Type: Conference Paper

References (9)

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