Energy minimisation for processor cores using variable supply voltages

IEE Colloquium (Digest)

Volumn , Issue 110, 2000, Pages 71-74

  Schmitz, Marcus T ^a   Al Hashimi, Bashir M ^a  

^a UNIVERSITY OF SOUTHAMPTON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; DIGITAL CIRCUITS; ELECTRIC POTENTIAL; INTEGER PROGRAMMING; ITERATIVE METHODS; PROBLEM SOLVING; PROGRAM PROCESSORS; SYSTEMS ANALYSIS; THEOREM PROVING; VLSI CIRCUITS;

LEAST COMMON MULTIPLE (LCM) THEOREM; POWER CONSUMPTION; PROCESSING ELEMENTS (PE); SYSTEM-ON-A-CHIP (SOC);

ENERGY DISSIPATION;

EID: 6344270324     PISSN: 09633308     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Conference Paper

References (15)

1. 'International technology roadmap for semiconductors' http://notes.sematech.org/ntrs/PubINTRS.nsf
2. NAMGOONG, W., YU, M., and MENG, T.: 'A high-efficiency variable-voltage cmos dynamic dc-dc switching regulator,' Proc. IEEE Int. Solid-State Circuits Conf., 1997, pp. 380-381
3. GUTNIK, VADIM, and CHANDRAKASAN, ANANTHA: 'Embedded power supply for low-power dsp,' IEEE Trans. on VLSI Systems, 1997
4. RAJE, SALIL, and SARRAFZADEH, MAJID: 'Variable voltage scheduling,' Proceedings 1995 International Symposium on Low Power Design, Apr 1995, pp. 9-14
5. CHANG, JUI-MING, and PEDRAM, MASSOUD: 'Energy minimization using multiple supply voltages,' IEEE Trans. on VLSI Systems, 1997, 5(4)
6. LEE, YANN-HANG, and KRISHNA, C.M.: 'Voltage-clock scaling for low energy consumption in real-time embedded systems,' Sixth International Conference on Real-Time Computing Systems and Applications, 1999
7. ISHIHARA, TOHRU, and YASUURA, HIROTO: 'Voltage scheduling problem for dynamically variable voltage processors,' Proceedings 1998 International Symposium on Low Power Design, 1998, pp. 197-202
8. HONG, INKI, KIROVSKI, DARKO, QU, GANG, POTKONJAK, MIODRAG, and SRIVASTAVA, MANI B.: 'Power optimization of variable-voltage core-based systems,' IEEE Trans. Computer-Aided Design, 1999, 18(12), pp. 1702-1714
9. SHIN, YOUNGSOO, and CHOI, KIYOUNG: 'Power conscious fixed priority scheduling for hard real-time systems,' Proceedings of the 36th Design Automation Conference, 1999, pp. 134-139
10. TIWARI, VIVEK, MALIK, SHARAD, and WOLFE, ANDREW: 'Power analysis of embedded software: A first step towards software power minimization,' IEEE Trans. on VLSI Systems, 1994
11. BURNS, ALAN, and WELLINGS, ANDY: 'Real-time systems and programming languages' (Addison-Wesley, 1989)
12. F. Vahid, D.D. Gajski, and J. Gong: 'A Binary-Constraint Search Algorithm for Minimizing Hardware During Hardware/Software Partitioning,' Proc. European Design Automation Conference (EURO-DAC94), Grenoble, France, Sept. 1994, IEEE Computer Society, IEEE Computer Society Press, pp. 214-219
13. KIROVSKI, DARKO, and POTKONJAK, MIODRAG: 'System-level synthesis of low-power hard real-time systems,' Proceedings of the 34th Design Automation Conference, 1997, pp. 697-702
14. CHANDRAKASAN, ANANTHA P., and BRODERSEN, ROBERT W.: 'Low power digital cmos design' (Kluwer Academic Publisher, 1995)
15. TIWARI, V., and LEE, M.: 'Power analysis of a 32-bit embedded microcontroller,' Asia and South Pacific Design Automation Conference, Aug 1995, pp. 141-148