Using graphics processors for parallelizing hash-based data carving

Proceedings of the 42nd Annual Hawaii International Conference on System Sciences, HICSS

Volumn , Issue , 2009, Pages

  Collange, Sylvain ^a   Daumas, Marc ^a   Dandass, Yoginder S ^b   Defour, David ^a  

^a UNIVERSITÉ DE PERPIGNAN   (France)

^b MISSISSIPPI STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BRUTE-FORCE APPROACHES; DIGITAL FORENSICS; FILE FRAGMENTS; GRAPHICS PROCESSING UNITS; GRAPHICS PROCESSORS; IMAGE FILES; PARALLELIZING; PATTERN MATCHES; SOFTWARE IMPLEMENTATIONS;

INDUSTRIAL RESEARCH;

DISKS (STRUCTURAL COMPONENTS);

EID: 63349096369     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HICSS.2009.494     Document Type: Conference Paper

References (13)

1. N-F. Huang, H-W. Hung, S-H. Lai, Y-M. Chu, and W-Y. Tsai, "A GPU-Based Multiple-Pattern Matching Algorithm for Network Intrusion Detection Systems" in 22nd International Conference on Advanced Information Networking and Applications, 2008.
2. R. L. Rivest, "The MD5 Message Digest Algorithm," Internet RFC 131, 1992, retrieved January 18, 2008, from http://people.csail.mit.edu/rivest/ Rivest-MD5.txt
3. NIST-ITL, "Secure Hash Standard (SHS)," 2002, Retrieved January 18, 2008 from http://csrc.nist.gov/publications/fips/fips180-2/fips180-2.pdf.
4. D. V. Sarwate, "Computation of Cyclic Redundancy Checks via Table Look-Up," Communications of the ACM, 31(8), 1988.
5. Y. S. Dandass, N. J. Necaise, and S. R. Thomas, "An Empirical Analysis of Disk Sector Hashes for Data Carving," Journal of Digital Forensic Practice, 2(2), 2008
6. J. Deepakumara, H. M. Heys, and R. Venkatesan, "FPGA implementation of MD5 hash algorithm," in Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2001.
7. V. Roussev, G. G. Richard III, and L. Marziale, "Multiresolution similarity hashing," Digital Investigation, 4(S1), 2007.
8. th Hawaii International Conference on System Sciences, 2007.
9. L. Marzialea, G. G. Richard III, and V. Roussev, "Massive threading: Using GPUs to increase the performance of digital forensics tools," 4(S1), 2007.
10. S. Collange, M. Daumas and D. Defour, "Line-by-line spectroscopic simulations on graphics processing units", Computer Physics Communications, 178(2), 2008.
11. E. Lindholm, J. Nickolls, S. Oberman, and J. Montrym, "NVidia Tesla: A unified graphics and computing architecture", IEEE Micro, 28(2).
12. M. E. Kounavis and F. L. Berry, "Novel Table Lookup-Based Algorithms for High Performance CRC Generation", IEEE Transaction on Computers, 20 May, 2008.
13. A. P. Kakarountas, H. Michail, A. Milidonis, C. E. Goutis, and G. Theodoridis., "High-Speed FPGA Implementation of Secure Hash Algorithm for IPSec and VPN Applications," Journal of Supercomputing, 37(2).