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Volumn , Issue , 2008, Pages 81-88

Design and implementation of a high performance financial Monte-Carlo simulation engine on an FPGA supercomputer

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; MAXWELL EQUATIONS; MONTE CARLO METHODS; SUPERCOMPUTERS;

EID: 63049125164     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPT.2008.4762369     Document Type: Conference Paper
Times cited : (30)

References (14)
  • 2
    • 0033284649 scopus 로고    scopus 로고
    • High-performance computing in finance: The last 10 years and the next
    • Zenios, S.A. High-performance computing in finance: The last 10 years and the next. Parallel Computing, 25 (13-14). 2149-2175.
    • Parallel Computing , vol.25 , Issue.13-14 , pp. 2149-2175
    • Zenios, S.A.1
  • 4
    • 43749121609 scopus 로고    scopus 로고
    • Hardware architectures for Monte-Carlo based financial simulations. In Field Programmable Technology, 2006. FPT 2006
    • Thomas, D.B., Bower, J.A. and Luk, W., Hardware architectures for Monte-Carlo based financial simulations. In Field Programmable Technology, 2006. FPT 2006. IEEE International Conference on, (2006), 377-380.
    • (2006) IEEE International Conference on , pp. 377-380
    • Thomas, D.B.1    Bower, J.A.2    Luk, W.3
  • 7
    • 0001541731 scopus 로고
    • A note on the generation of random normal deviates
    • G.E.P. Box et al., A note on the generation of random normal deviates, Ann. Math. Statist., Vol. 29, (1958), 610-611.
    • (1958) Ann. Math. Statist , vol.29 , pp. 610-611
    • Box, G.E.P.1
  • 8
    • 84968520264 scopus 로고
    • Random Numbers Generated by linear Recurrence Modulo Two, Math
    • R.C. Tausworthe, Random Numbers Generated by linear Recurrence Modulo Two, Math. And Computation, vol. 19, (1965), 201-209.
    • (1965) And Computation , vol.19 , pp. 201-209
    • Tausworthe, R.C.1
  • 12
    • 63049103558 scopus 로고    scopus 로고
    • Xilinx, Virtex-4 Family Overview, Product Specification, http://www.xilinx.com, DS112 (v3.0), September 28, 2007.
    • Xilinx, Virtex-4 Family Overview, Product Specification, http://www.xilinx.com, DS112 (v3.0), September 28, 2007.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.