FPGA implementation of support vector machine based isolated digit recognition system

Proceedings: 22nd International Conference on VLSI Design - Held Jointly with 7th International Conference on Embedded Systems

Volumn , Issue , 2009, Pages 347-352

  Manikandan, J ^a   Venkataramani, B ^a   Avanthi, V ^a  

^a NATIONAL INSTITUTE OF TECHNOLOGY   (India)

Author keywords

[No Author keywords available]

Indexed keywords

CHARACTER RECOGNITION; CONFORMAL MAPPING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUITS; SPEECH RECOGNITION; SUPPORT VECTOR MACHINES;

ALTERA CYCLONES; CUSTOM INSTRUCTIONS; DECISION FUNCTIONS; DIGIT RECOGNITION; FEATURE MAPPINGS; FIXED-POINT ARITHMETICS; FLOATING-POINT ARITHMETICS; FPGA IMPLEMENTATIONS; HARDWARE RESOURCES; LARGE VOCABULARIES; LINEAR PREDICTIVE COEFFICIENTS; LOGIC ELEMENTS; MEL-FREQUENCY CEPSTRAL COEFFICIENTS; MULTI-CLASS SVM; RECOGNITION ACCURACIES; SELF-ORGANIZED; SOFT-CORE PROCESSORS; SPEAKER DEPENDENTS; SPEAKER VERIFICATIONS; SVM CLASSIFIERS; TRAINING AND TESTING;

EMBEDDED SYSTEMS;

EID: 62949115115     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSI.Design.2009.23     Document Type: Conference Paper

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