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Volumn , Issue , 2007, Pages 573-579
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A novel unified control architecture for a high-performance network security accelerator
a
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Author keywords
Cryptography implementation; IPSec; Network co processor; Security accelerator; SSL TLS
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Indexed keywords
CONTROL LOGIC;
DESCRIPTOR;
EXTERNAL NETWORKS;
HARDWARE RESOURCES;
HIGH-PERFORMANCE NETWORKS;
INSTRUCTION SET ARCHITECTURES;
IPSEC;
KEY EXCHANGES;
NETWORK CO-PROCESSOR;
SCALAR MULTIPLICATIONS;
SECURITY ACCELERATOR;
SSL/TLS;
SSL/TLS PROTOCOLS;
UNIFIED CONTROLS;
ACCELERATION;
COMPUTER ARCHITECTURE;
CRYPTOGRAPHY;
DATA PROCESSING;
INTERNET;
NETWORK ARCHITECTURE;
POWER CONVERTERS;
NETWORK SECURITY;
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EID: 62349100277
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (1)
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References (13)
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