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Volumn , Issue , 2008, Pages 5029-5032
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NEUSORT2.0: A multiple-channel neural signal processor with systolic array buffer and channel-interleaving processing schedule
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Author keywords
[No Author keywords available]
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Indexed keywords
ELECTRIC POWER FACTOR;
RECORDING INSTRUMENTS;
ANALOG FRONT ENDS;
CYCLE BASIS;
DATA FLOWS;
INTERFACE CIRCUITRIES;
MEMORY HIERARCHIES;
MULTIPLE CHANNELS;
NEURAL DATUM;
NEURAL RECORDINGS;
NEURAL SIGNALS;
ON CHIPS;
PARALLEL STRUCTURES;
POWER FACTORS;
PROCESSING DELAYS;
PROCESSING HARDWARES;
PROCESSING SCHEDULES;
REAL TIME;
TIGHTLY-COUPLED;
SIGNAL PROCESSING;
ACTION POTENTIAL;
ALGORITHM;
ARTICLE;
BRAIN;
COMPUTER AIDED DESIGN;
ELECTROENCEPHALOGRAPHY;
EQUIPMENT;
EQUIPMENT DESIGN;
EQUIPMENT FAILURE;
HUMAN;
INFORMATION RETRIEVAL;
NERVE CELL;
PHYSIOLOGY;
REPRODUCIBILITY;
SENSITIVITY AND SPECIFICITY;
SIGNAL PROCESSING;
ACTION POTENTIALS;
ALGORITHMS;
BRAIN;
COMPUTER-AIDED DESIGN;
ELECTROENCEPHALOGRAPHY;
EQUIPMENT DESIGN;
EQUIPMENT FAILURE ANALYSIS;
HUMANS;
INFORMATION STORAGE AND RETRIEVAL;
NEURONS;
REPRODUCIBILITY OF RESULTS;
SENSITIVITY AND SPECIFICITY;
SIGNAL PROCESSING, COMPUTER-ASSISTED;
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EID: 61849155263
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (9)
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References (9)
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