A multi-pattern scheduling algorithm

Proceedings of the 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'05

Volumn , Issue , 2005, Pages 276-279

  Guo, Yuanqing ^a   Hoede, Cornelis ^a   Smit, Gerard J M ^a  

^a UNIVERSITY OF TWENTE   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

EMBEDDED SYSTEMS; SCHEDULING;

ARITHMETIC LOGIC UNITS; COARSE-GRAINED RECONFIGURABLE ARCHITECTURES; EFFICIENT SCHEDULING; LIST-SCHEDULING ALGORITHMS; RUN-TIME;

SCHEDULING ALGORITHMS;

EID: 60749111027     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

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4. P.G. Paulin and J.P. Knight, "Algorithms for High-Level Synthesis," IEEE Design and Test of Computers, Vol.6, No.4, Dec. 1989, pp.18-31.
5. L.J.Hafer and A.C. Parker, "A Formal Method for the specification, Analysis, and Design of Register-Transfer Level Digital Logic," IEEE Trans. Computer-Aided Design, Vol. CAD-2, No.1, Jan. 1983, pp. 4-18.