Fast thermal processing: Batch comes back

Solid State Technology

Volumn 39, Issue 6, 1996, Pages 113-124

  Dip, Anthony ^a,b,c,d  

^a MOTOROLA INC   (United States)

^b NORTH CAROLINA STATE UNIVERSITY   (United States)

^c IBM's East Fishkill ^*

^d MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 6044221367     PISSN: 0038111X     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Article

References (13)

1. "The National Technology Roadmap for Semiconductors," Semiconductor Industry Association, 122-4 (1994).
2. S.K. Griffiths, R.H. Nilson, R. Foote, K.J. Torres, "Modeling: thermal gradient, gravitational stresses & plastic deformation," Proceedings from the Wafer Defect Science and Engineering Topical Conference on Large Diameter Wafer and Thermal Issues, Austin, TX, SEMATECH (1995).
3. C. Lee, G.G. Noblitt III, "Next generation challenges to thermal processing," Semiconductor International, (3), 73-78 (1996).
4. A. Dip, W. Houf, C. Moen, C. Ratliff, "Silicon Valley Group/Thermco Systems fast ramp furnace modeling and evaluation, phase I," SEMATECH (1996).
5. R.H. Nilson, S.K. Griffiths, W.G. Houf, "Analytical determination of minimum ramp times for fast ramp reactors," Small Batch Fast Ramp PTAB, SEMATECH (May 20, 1994).
6. M. Schrems, et al., "Simulation of temperature distributions during fast thermal processing," Semiconductor Silicon/94, 1050-1063, eds. H.R. Huff, W. Bergholz, K. Sumino, The Electrochemical Society Inc., Pennington, NJ.
7. K.G. Reid, A.R. Sitaram, "Rapid thermal processing for ULSI applications: An overview," Solid State Technology, vol. 39, no. 2, 63-74 (1996).
8. C. Batur, R.B. Sharpless, W.M.B. Duval, B.N. Rosenthal, "Self-tuning multivariable pole placement control of a multizone crystal growth furnace," Int. J. of Adaptive Control and Signal Processing, vol. 6, 127-138 (1992).
9. H. De Waard, W.L. De Koning, "Optimal control of the wafer temperatures in diffusion/LPCVD reactors," Automatica, vol. 28, no. 2., 243-253 (1992).
10. S. Shah, P. Pandey, "Concurrent development of a small batch reactor: Designing for effective dynamic behavior," SEMATECH, TT# 95052832A-TR (1995).
11. W. Fosnight, R. Martin, A. Bonora, "300mm: A new frontier," Solid State Technology, vol. 39, no. 2, 77-81 (1996).
12. M. Schrems, H.J. Timme, P. Kuecher, "Transient simulation of defect onset in 300-mm wafer batch-type processing," Proceedings from the Wafer Defect Science and Engineering Topical Conference on Large Diameter Wafer and Thermal Issues, Austin , TX, SEMATECH (1995).
13. A. Dip, "In situ temperature measurements for fast thermal batch processing of 300-mm silicon substrates," SEMATECH, to be published.