Writing productive stencil codes with overlapped tiling

Concurrency and Computation: Practice and Experience

Volumn 21, Issue 1, 2009, Pages 25-39

  Guo, Jia ^a   Bikshandi, Ganesh ^b   Fraguela, Basilio B ^c   Padua, David ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b IBM INDIA RESEARCH LAB   (India)

^c UNIVERSITY OF A CORUÑA   (Spain)

Author keywords

Overlapped tiling; Productivity; Shadow regions; Stencil computations; Tiles

Indexed keywords

PRODUCTIVITY; TILE;

COMPUTATIONAL KERNELS; DATA LOCALITY; DEGREE OF PARALLELISM; HIERARCHICALLY TILED ARRAYS; OVERLAPPED TILING; SCIENTIFIC APPLICATIONS; SHADOW REGIONS; STENCIL COMPUTATIONS;

CODES (SYMBOLS);

EID: 58149239639     PISSN: 15320626     EISSN: 15320634     Source Type: Journal    
DOI: 10.1002/cpe.1340     Document Type: Article

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