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Volumn , Issue , 2008, Pages 982-986

Implementation of fuzzy cellular neural network with image sensor in CMOS technology

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG CIRCUITS; CMOS INTEGRATED CIRCUITS; DIGITAL IMAGE STORAGE; DYNAMICS; FUZZY NEURAL NETWORKS; IMAGE SENSORS; MATHEMATICAL MORPHOLOGY; NETWORKS (CIRCUITS); NEURAL NETWORKS; PIXELS; SENSOR NETWORKS; SENSORS; VEGETATION;

EID: 58149173153     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCCAS.2008.4657934     Document Type: Conference Paper
Times cited : (3)

References (14)
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  • 6
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    • Liu, Y.1    Tang, W.2
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    • Shitong, W.1    Min, W.2
  • 9
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    • High-speed high precision min/max circuits in CMOS technology
    • R. G. Carvajal, J. Ramirez-Angulo, and J. Martinez-Heredia, "High-speed high precision min/max circuits in CMOS technology," Electronics Letters, vol. 36, no. 8, pp697-699, 2000.
    • (2000) Electronics Letters , vol.36 , Issue.8 , pp. 697-699
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  • 11
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    • Jui-Lin Lai, Yuan-Hung Lo, Rong-Jian Chen, and Cheng-Fang Tai Architectural Design of Multiplicative type-II Fuzzy Cellular Neural Network in CMOS Technology, in Proc. 2006 IEEE International Symposium on Consumer Electronic, ISCE 2007, Dallae, TX., USA.
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    • Area-efficient correlated double sampling scheme with single sampling capacitor for CMOS image sensors
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  • 14
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.