A memory-reduced direct digital frequency synthesizer for OFDM receiver systems

IEEE Transactions on Consumer Electronics

Volumn 54, Issue 4, 2008, Pages 1564-1568

  Li, Xiaojin ^a   Lai, Linhui ^a   Lei, Ao ^a   Lai, Zongsheng ^a  

^a EAST CHINA NORMAL UNIVERSITY   (China)

Author keywords

Carrier frequency offset; Direct digital synthesizer; Memory reduction; OFDM

Indexed keywords

CIVIL AVIATION; DIGITAL ARITHMETIC; FAST FOURIER TRANSFORMS; FREQUENCY ALLOCATION; FREQUENCY DIVISION MULTIPLEXING; FREQUENCY SYNTHESIZERS; ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; SIGNAL ENCODING; SIGNAL GENERATORS; TUNING;

AND RECOVERIES; CARRIER FREQUENCY OFFSET; DIRECT DIGITAL FREQUENCY SYNTHESIZERS; DIRECT DIGITAL SYNTHESIZER; DIRECT FREQUENCY SYNTHESIZERS; FREQUENCY-TUNING; LOOK-UP TABLES; MEMORY REDUCTION; OFDM; PERFORMANCE ANALYSES; PHASE ACCUMULATORS; POWER CONSUMPTIONS; RECEIVER SYSTEMS; RECOVERY SCHEMES; T SYSTEMS;

FREQUENCY ESTIMATION;

EID: 58149166579     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCE.2008.4711202     Document Type: Article

References (13)

1. G. Santella, "A frequency and symbol synchronization system for OFDM signals: Architecture and simulation results," IEEE Trans. Vehicular. Technol., vol. 49, no. 1, pp. 254-275, Jan. 2000
2. Tiejun lv, Hua Li, and Jie Chen, "Joint estimation of symbol timing and carrier frequency offset of OFDM signals over fast time-varying multipath channels," IEEE Trans. Circuits Signal Processing, vol. 53, no. 12, pp. 4526-4535, Dec. 2005
3. Bar-Giora Goldberg, "Digital frequency synthesis demystified," LLH Technology Publishing, 1999
4. B.H. Hutchison, Jr., Frequency Synthesis and Applications, IEEE Press 1975. 4
5. J. M. Pierre Langlois and Dhamin Al-Khalili, "Novel Approach to the Design of Direct Digital Frequency Synthesizers Based on Linear Interpolation," IEEE Tran. Circuits and systems - II: Analog and digital signal processing, vol. 50, no. 9, pp. 567-578, Sept 2003
6. A. Bellaouar and S. O. Michael, "Low-power direct digital frequency synthesis for wireless communications," IEEE Jounalof Solid-state Circuits, vol. 35, no. 3, pp. 385-390, March 2000
7. M. Kesoulis, D. Soudris and C. Koukourlis, "Systematic methodology for designing low power direct digital frequency synthesizers," IET Circuits Devices Syst., pp. 293-304, Jan. 2007
8. David Ramfrez Moran, Javier Gismero Menoyo, "Novel direct digital synthesizer design for OFDM digital receivers," Wireless Technology, 2006. The 9th European Conf. on. pp. 27-30, Sept. 2006
9. Kroupa V F, "Discrete spu6ous signals and background noise in direct digital frequency synthesizers," IEEE Intern. Fre. Contr. Symp. pp. 242-250, 1993.
10. H. T. Nicholas and H. Samueli, "An analysis of the output spectrum of direct digital frequency synthesizers in the presence of phaseaccumulator trunction," Proc. 41st Annual Frequency Control Symp., 1987, pp.495-502.
11. A.Yamagishi, M. Ishikawa, T, Tsukahara and S. Date, "A 2-V, 2-GHz low-power direct digital frequency synthesizer chip-set for wireless communication," IEEE J. Solate-State Circuits, vol. 33, 1998, pp.210-21
12. J.J. Beek, M. Sandell and P. O. Borjesson, "ML estimation of time and frequency offset in OFDM systems," IEEE Trans. Signal Processing, vol. 45, no.7, July 1997, pp1800-1805
13. L. Wei and C. Schlegel, "Synchronization requirements for multi-user OFDM on satellite mobile and two-path Rayleigh fading channels," IEEE Trans. Commun., vol. 43, pp.887-895, Feb./Mar./Apr. 1995.