-
1
-
-
0025623486
-
Model-Checking for Real-Time Systems
-
R. Alur, C. Couroubetis, and D.L. Dill, "Model-Checking for Real-Time Systems," Proc. Fifth Ann. IEEE Symp. Logic in Computer Science, pp. 414-425, 1990.
-
(1990)
Proc. Fifth Ann. IEEE Symp. Logic in Computer Science
, pp. 414-425
-
-
Alur, R.1
Couroubetis, C.2
Dill, D.L.3
-
4
-
-
84949238101
-
Modeling Urgency in Timed Systems
-
S. Bornot, J. Sifakis, and S. Tripakis, "Modeling Urgency in Timed Systems," Proc. Int'l Symp. Compositionality: The Significant Difference, pp. 103-129, 1997.
-
(1997)
Proc. Int'l Symp. Compositionality: The Significant Difference
, pp. 103-129
-
-
Bornot, S.1
Sifakis, J.2
Tripakis, S.3
-
6
-
-
33750919281
-
How to Stop Time Stopping
-
H. Bowman and R. Gómez, "How to Stop Time Stopping," Formal Aspect of Computing, vol. 18, no. 4, pp. 459-493, 2006.
-
(2006)
Formal Aspect of Computing
, vol.18
, Issue.4
, pp. 459-493
-
-
Bowman, H.1
Gómez, R.2
-
7
-
-
27644452781
-
A Tool for the Syntactic Detection of Zeno-Timelocks in Timed Automata
-
H. Bowman, R. Gómez, and L. Su, "A Tool for the Syntactic Detection of Zeno-Timelocks in Timed Automata," Electronic Notes in Theoretical Computer Science, vol. 139, no. 1, pp. 25-47, 2005.
-
(2005)
Electronic Notes in Theoretical Computer Science
, vol.139
, Issue.1
, pp. 25-47
-
-
Bowman, H.1
Gómez, R.2
Su, L.3
-
8
-
-
10644276553
-
A Timed Semantics for a Hierarchical Design Notation,
-
PhD dissertation, Univ. of York
-
P. Brooke, "A Timed Semantics for a Hierarchical Design Notation," PhD dissertation, Univ. of York, 1999.
-
(1999)
-
-
Brooke, P.1
-
9
-
-
26444458744
-
A Model for Communicating Sequential Processes,
-
PhD dissertation, Oxford Univ
-
S.D. Brooke, "A Model for Communicating Sequential Processes," PhD dissertation, Oxford Univ., 1983.
-
(1983)
-
-
Brooke, S.D.1
-
11
-
-
21244459020
-
From HUPPAAL to UPPAAL: A Translation from Hierarchical Timed Automata to Flat Timed Automata,
-
Technical Report RS-01-11, BRICS, Mar
-
A. David and M.O. Möller, "From HUPPAAL to UPPAAL: A Translation from Hierarchical Timed Automata to Flat Timed Automata," Technical Report RS-01-11, BRICS, Mar. 2001.
-
(2001)
-
-
David, A.1
Möller, M.O.2
-
13
-
-
0031386947
-
Formalizing Process Scheduling Requirements for an Aircraft Operational Flight Program
-
J.S. Dong, N. Fulton, L. Zucconi, and J. Colton, "Formalizing Process Scheduling Requirements for an Aircraft Operational Flight Program," Proc. First IEEE Int'l Conf. Formal Eng. Methods, pp. 161-169, 1997.
-
(1997)
Proc. First IEEE Int'l Conf. Formal Eng. Methods
, pp. 161-169
-
-
Dong, J.S.1
Fulton, N.2
Zucconi, L.3
Colton, J.4
-
14
-
-
35048882515
-
Timed Patterns: TCOZ to Timed Automata
-
J.S. Dong, P. Hao, S.C. Qin, J. Sun, and W. Yi, "Timed Patterns: TCOZ to Timed Automata," Proc. Sixth Int'l Conf. Formal Eng. Methods, pp. 483-498, 2004.
-
(2004)
Proc. Sixth Int'l Conf. Formal Eng. Methods
, pp. 483-498
-
-
Dong, J.S.1
Hao, P.2
Qin, S.C.3
Sun, J.4
Yi, W.5
-
15
-
-
33845248913
-
A Reasoning Method for Timed CSP Based on Constraint Solving
-
J.S. Dong, P. Hao, J. Sun, and X. Zhang, "A Reasoning Method for Timed CSP Based on Constraint Solving," Proc. Eighth Int'l Conf. Formal Eng. Methods, pp. 342-359, 2006.
-
(2006)
Proc. Eighth Int'l Conf. Formal Eng. Methods
, pp. 342-359
-
-
Dong, J.S.1
Hao, P.2
Sun, J.3
Zhang, X.4
-
16
-
-
84949515040
-
Modeling Aircraft Mission Computer Task Rates
-
J.S. Dong, B.P. Mahony, and N. Fulton, "Modeling Aircraft Mission Computer Task Rates," Proc. World Congress on Formal Methods, p. 1855, 1999.
-
(1999)
Proc. World Congress on Formal Methods
, pp. 1855
-
-
Dong, J.S.1
Mahony, B.P.2
Fulton, N.3
-
17
-
-
0141637669
-
Formal Object Oriented Specification Using Object-Z
-
Macmillan
-
R. Duke and G. Rose, "Formal Object Oriented Specification Using Object-Z," Cornerstones of Computing, Macmillan, 2000.
-
(2000)
Cornerstones of Computing
-
-
Duke, R.1
Rose, G.2
-
18
-
-
0032667112
-
Patterns in Property Specifications for Finite-State Verification
-
M.B. Dwyer, G.S. Avrunin, and J.C. Corbett, "Patterns in Property Specifications for Finite-State Verification," Proc. 21st Int'l Conf. Software Eng., pp. 411-420, 1999.
-
(1999)
Proc. 21st Int'l Conf. Software Eng
, pp. 411-420
-
-
Dwyer, M.B.1
Avrunin, G.S.2
Corbett, J.C.3
-
19
-
-
33747387636
-
The Aerospace Demonstrator of DECOS
-
H. Fuhrmann, J. Koch, J. Rennhack, and R.v. Hanxleden, "The Aerospace Demonstrator of DECOS," Proc. Eighth Int'l IEEE Conf. Intelligent Transportation Systems, pp. 19-24, 2005.
-
(2005)
Proc. Eighth Int'l IEEE Conf. Intelligent Transportation Systems
, pp. 19-24
-
-
Fuhrmann, H.1
Koch, J.2
Rennhack, J.3
Hanxleden, R.V.4
-
20
-
-
0025421619
-
Trio: A Logic Language for Executable Specifications of Real-time System
-
May
-
C. Ghezzi, D. Mandrioli, and A. Morzenti, "Trio: A Logic Language for Executable Specifications of Real-time System," J. Systems and Software, vol. 12, no. 2, pp. 107-123, May 1990.
-
(1990)
J. Systems and Software
, vol.12
, Issue.2
, pp. 107-123
-
-
Ghezzi, C.1
Mandrioli, D.2
Morzenti, A.3
-
21
-
-
56649119736
-
-
UML Resource Page, Object Management Group, http://www.omg.org/uml/, 2008.
-
(2008)
UML Resource Page
-
-
-
22
-
-
33646401524
-
Patterns for Timed Property Specifications
-
V. Gruhn and R. Laue, "Patterns for Timed Property Specifications," Electronic Notes in Theoretical Computer Science, vol. 153, no. 2, pp. 117-133, 2006.
-
(2006)
Electronic Notes in Theoretical Computer Science
, vol.153
, Issue.2
, pp. 117-133
-
-
Gruhn, V.1
Laue, R.2
-
23
-
-
34548140059
-
Timed Behavior Trees and Their Application to Verifying Real-Time Systems
-
L. Grunske, K. Winter, and R. Colvin, "Timed Behavior Trees and Their Application to Verifying Real-Time Systems," Proc. 18th Australian Software Eng. Conf., pp. 211-222, 2007.
-
(2007)
Proc. 18th Australian Software Eng. Conf
, pp. 211-222
-
-
Grunske, L.1
Winter, K.2
Colvin, R.3
-
24
-
-
0031187475
-
Executable Object Modeling with Statecharts
-
July
-
D. Harel and E. Grey, "Executable Object Modeling with Statecharts," Computer, vol. 30, no. 7, pp. 31-42, July 1997.
-
(1997)
Computer
, vol.30
, Issue.7
, pp. 31-42
-
-
Harel, D.1
Grey, E.2
-
25
-
-
0031354378
-
Formal Modeling and Analysis of an Audio/Video Protocol: An Industrial Case Study Using UPPAAL
-
K. Havelund, A. Skou, K.G. Larsen, and K. Lund, "Formal Modeling and Analysis of an Audio/Video Protocol: An Industrial Case Study Using UPPAAL," Proc. 18th IEEE Real-Time Systems Symp., pp. 2-13, 1997.
-
(1997)
Proc. 18th IEEE Real-Time Systems Symp
, pp. 2-13
-
-
Havelund, K.1
Skou, A.2
Larsen, K.G.3
Lund, K.4
-
29
-
-
0023399846
-
A Graph-Theoretic Approach for Timing Analysis and Its Implementation
-
Aug
-
F. Jahanian and A.K. Mok, "A Graph-Theoretic Approach for Timing Analysis and Its Implementation," IEEE Trans. Computers, vol. 36, no. 8, pp. 961-975, Aug. 1987.
-
(1987)
IEEE Trans. Computers
, vol.36
, Issue.8
, pp. 961-975
-
-
Jahanian, F.1
Mok, A.K.2
-
32
-
-
29244458148
-
Testing Real-Time Embedded Software Using UPPAAL-TRON: An Industrial Case Study
-
K.G. Larsen, M. Mikucionis, B. Nielsen, and A. Skou, "Testing Real-Time Embedded Software Using UPPAAL-TRON: An Industrial Case Study," Proc. Fifth ACM Int'l Conf. Embedded Software, pp. 299-306, 2005.
-
(2005)
Proc. Fifth ACM Int'l Conf. Embedded Software
, pp. 299-306
-
-
Larsen, K.G.1
Mikucionis, M.2
Nielsen, B.3
Skou, A.4
-
33
-
-
84896693115
-
Uppaal in a Nutshell
-
K.G. Larsen, P. Pettersson, and Y. Wang, "Uppaal in a Nutshell," Int'l J. Software Tools for Technology Transfer, vol. 1, nos. 1-2, pp. 134-152, 1997.
-
(1997)
Int'l J. Software Tools for Technology Transfer
, vol.1
, Issue.1-2
, pp. 134-152
-
-
Larsen, K.G.1
Pettersson, P.2
Wang, Y.3
-
34
-
-
84896694148
-
-
M. Lindahl, P. Pettersson, and Y. Wang, Formal Design and Analysis of a Gearbox Controller, Springer Int'l J. Software Tools for Technology Transfer, 3, no. 3, pp. 353-368, 2001.
-
M. Lindahl, P. Pettersson, and Y. Wang, "Formal Design and Analysis of a Gearbox Controller," Springer Int'l J. Software Tools for Technology Transfer, vol. 3, no. 3, pp. 353-368, 2001.
-
-
-
-
35
-
-
0004505683
-
Action Transducers and Timed Automata
-
N.A. Lynch and F.W. Vaandrager, "Action Transducers and Timed Automata," Formal Aspects of Computing, vol. 8, no. 5, pp. 499-538, 1996.
-
(1996)
Formal Aspects of Computing
, vol.8
, Issue.5
, pp. 499-538
-
-
Lynch, N.A.1
Vaandrager, F.W.2
-
36
-
-
0033734546
-
Timed Communicating Object Z
-
Feb
-
B. Mahony and J.S. Dong, "Timed Communicating Object Z," IEEE Trans. Software Eng., vol. 26, no. 2, pp. 150-177, Feb. 2000.
-
(2000)
IEEE Trans. Software Eng
, vol.26
, Issue.2
, pp. 150-177
-
-
Mahony, B.1
Dong, J.S.2
-
38
-
-
4544348186
-
Timed CSP = Closed Timed Epsilon-Automata
-
J. Ouaknine and J. Worrell, "Timed CSP = Closed Timed Epsilon-Automata," Nordic J. Computing, vol. 10, no. 2, pp. 99-133, 2003.
-
(2003)
Nordic J. Computing
, vol.10
, Issue.2
, pp. 99-133
-
-
Ouaknine, J.1
Worrell, J.2
-
42
-
-
0141796738
-
A Formal Object Approach to the Design of ZML
-
J. Sun, J.S. Dong, J. Liu, and H. Wang, "A Formal Object Approach to the Design of ZML," Annals of Software Eng., vol. 13, pp. 329-356, 2002.
-
(2002)
Annals of Software Eng
, vol.13
, pp. 329-356
-
-
Sun, J.1
Dong, J.S.2
Liu, J.3
Wang, H.4
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