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Volumn 1601, Issue , 1999, Pages 334-353

Modelling timeouts without timelocks

Author keywords

[No Author keywords available]

Indexed keywords

ALGEBRA; AUTOMATA THEORY; FORMAL METHODS;

EID: 84957712019     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-48778-6_20     Document Type: Conference Paper
Times cited : (12)

References (13)
  • 9
    • 20444388330 scopus 로고    scopus 로고
    • An introduction to ET-LOTOS for the description of time-sens itive systems
    • L. Leonard and G. Leduc. An introduction to ET-LOTOS for the description of time-sens itive systems. Computer Networks and ISDN Systems, 29:271-292, 1996.
    • (1996) Computer Networks and ISDN Systems , vol.29 , pp. 271-292
    • Leonard, L.1    Leduc, G.2
  • 11
    • 0001747748 scopus 로고
    • An overview and synthesis on timed process algebra
    • LNCS 600, Springer-Verlag, June
    • X. Nicollin and J. Sifakis. An overview and synthesis on timed process algebra. In Real-time Theory in Practice, LNCS 600, pages 549-572. Springer-Verlag, June 1991.
    • (1991) Real-time Theory in Practice , pp. 549-572
    • Nicollin, X.1    Sifakis, J.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.