A new cmos charge pump for low voltage applications

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 4261-4264

  Ahmadi, Mohammad Mahdi ^a   Jullien, Graham ^a  

^a UNIVERSITY OF CALGARY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE PUMP; CMOS CHARGE PUMPS; CONTROL SCHEMES; CONTROL VOLTAGES; DYNAMIC INVERTERS; LOW SUPPLY VOLTAGES; LOW-VOLTAGE APPLICATIONS; MOS SWITCHES; MOS TRANSISTORS; NODE VOLTAGES; REVERSE CURRENTS; SIMULATION RESULT; TRANSFER SWITCHES;

CHARGE TRANSFER; ION EXCHANGE; SWITCHES; TRANSISTOR TRANSISTOR LOGIC CIRCUITS;

PUMPS;

EID: 57849134155     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465572     Document Type: Conference Paper

References (7)

1. G. Palumbo, D. Pappalardo and M. Gaibotti, "Charge- pump circuits: power-consumption optimization," IEEE Transaction on Circuits and systems I, vol. 49, no. 11, pp.1535-1542, Nov. 2002.
2. J. Dickson, "On-chip high-voltage generation MNOS integrated circuits using an improved voltage multiplier techniques," IEEE J. of Solid-State Circuits, vol SC-11, pp.374-378, June 1976.
3. M. R. Hoque, T. McNutt, J. Zhang, A. Mantooth, M. Mojarradi, "A high voltage Dickson charge pump in SOI CMOS," Proceeding of the IEEE Custom Integrated Circuits Conference, pp. 493-496, Sept. 2003.
4. K.-H. Choi, J.-M. Park, J.-K. Kim, T.-S. Jung, and K.-D. Suh, "Floating well charge pump circuits for sub-2.0 V single power supply Flash memories," in Symp. VLSI Circuits Dig. Tech. Papers, pp. 61-62, June 1997.
5. J. Shin, I.-Y. Chung, Y. J. Park, H. S. Min, "A new charge pump without degradation in threshold voltage due to body effect," IEEE J. of Solid-State Circuits, vol. 35, no. 8, pp. 1227-1230, Aug. 2000.
6. J.-T. Wu and K.-L. Chang, "MOS charge pumps for low-voltage operation," IEEE J. of Solid-State Circuits, vol. 33, no. 4, pp. 592-597, April 1998.
7. T. Ying, W.-H. Ki, M. Chan, "Area-efficient CMOS charge pumps for LCD drivers," IEEE J. of Solid-State Circuits, vol. 38, no. 10, pp. 1721-1725, Oct. 2003.