Analytical fixed-point accuracy evaluation in linear time-invariant systems

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 55, Issue 10, 2008, Pages 3197-3208

  Menard, Daniel ^a   Rocher, Romuald ^a   Sentieys, Olivier ^a  

^a UNIVERSITÉ DE RENNES 1   (France)

Author keywords

Accuracy evaluation; Design automation; Digital signal processing systems; Fixed point arithmetic; Linear time invariant (LTI) systems; Quantization noise; Roundoff errors; Signal to quantization noise ratio

Indexed keywords

COMPUTER AIDED DESIGN; DIGITAL SIGNAL PROCESSING; INVARIANCE; LINEAR SYSTEMS; QUANTIZATION (SIGNAL); SPECIFICATIONS; TIME VARYING CONTROL SYSTEMS;

ACCURACY EVALUATION; DESIGN AUTOMATIONS; DIGITAL SIGNAL PROCESSING SYSTEMS; LINEAR TIME-INVARIANT SYSTEM; QUANTIZATION NOISE; ROUND-OFF ERRORS; SIGNAL TO QUANTIZATION NOISE RATIOS;

FIXED POINT ARITHMETIC;

EID: 57149139988     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2008.923279     Document Type: Article

References (37)

1. B. Evans, "Modem design, implementation, and testing using NI's Lab-VIEW," in Nat. Instrument Acad. Day, Beirut, Lebanon, Jun. 2005.
2. J. Eyre and J. Bier, "The evolution of DSP processors," IEEE Signal Process. Mag., vol. 17, no. 2, pp. 43-51, Mar. 2000.
3. W. Strauss, "DSP chips take on many forms," DSP-FPGA. Com. Mag., Mar. 2006.
4. J. Eyre and J. Bier, "DSPs court the consumer," IEEE Spectrum, vol. 36, no. 3, pp. 47-53, 1999.
5. M. Clark, M. Mulligan, D. Jackson, and D. Linebarger, "Accelerating fixed-point design for MB-OFDM UWB systems," CommsDesign, Jan. 2005.
6. T. Hill, "Acceldsp synthesis tool floating-point to fixed-point conversion of matlab algorithms targeting fpgas," in White Papers :XIlinx, 2006.
7. S. Kim, K. Kum, and S. Wonyong, "Fixed-point optimization utility for C and C++ based digital signal processing programs," IEEE Trans. Circuits and Syst. II: Anal. Digit. Signal Process., vol. 45, no. 11, pp. 1455-1464, Nov. 1998.
8. M. Willems, H. Keding, T. Grotker, and H. Meyr, "FRIDGE: An interactive fixed-point code generation environment for HW/SW-CoDesign," in 1997 IEEE Int. Conf. on Acoust., Speech and Signal Process. (ICASSP 97), Munich, Germany, Apr. 1997, pp. 297-290.
9. D. Menard, D. Chillet, and O. Sentieys, "Floating-to-fixed-point conversion for digital signal processors," EURASIP J. Appl. Signal Process., vol. 2006, pp. 1-19, Jan. 2006.
10. H. Keding, F. Hurtgen, M. Willems, and M. Coors, "Transformation of floating-point into fixed-point algorithms by interpolation applying a statistical approach," in 9th Int. Conf. on Signal Proc. Appl. Technol. (ICSPAT 98), 1998.
11. K. Kum and W. Sung, "Word-length optimization for high level synthesis of digital signal processing systems," in IEEE Workshop on Signal Process. Syst. (SIPS 98), Boston, US, Oct. 1998, pp. 142-151.
12. B. Liu, "Effect of finite word length on the accuracy of digital filters - A review," IEEE Trans, Circuit Theory, vol. CT-18, no. 6, pp. 670-677, Nov. 1971.
13. Tran-Thong and B. Liu, "Fixed-point fast Fourrier transform error analysis," IEEE Trans. Acoust. Speech, Signal Process., vol. ASSP-24, no. 6, pp. 563-576, Dec. 1976.
14. C. Caraiscos and B. Liu, "A roundoff erro analysis of the LMS adaptive algorithm," IEEE Trans. Acoust. Speech, Signal Process., vol. ASSP-32, no. 1, pp. 34-41, Feb. 1984.
15. R. Rocher, D. Menard, N. Herv, and O. Sentieys, "Fixed-point configurable hardware components," EURASIP J. Embedded Syst., vol. 2006, no. Article ID 23197, pp. 1-13, 2006.
16. L. D. Coster, M. Ade, R. Lauwereins, and J. Peperstraete, "Code generation for compiled bit-true simulation of DSP applications," in IEEE Int. Symp. on Syst. Synthesis (ISSS'98), Hsinchu, Taiwan, Dec. 1998, pp. 9-14.
17. H. Keding, M. Willems, M. Coors, and H. Meyr, "FRIDGE: A fixed-point design and simulation environment," in IEEE/ACM Conf. on Design, Automation and Test in Europe 1998 (DATE 98), Paris, France, Mar. 1998, pp. 429-435.
18. F. Berens and N. Naser, Algorithm to System-on-Chip Design Flow That Leverages System Studio and SystemC 2.0.1. city??: Synopsys Inc., 2004.
19. Fixed-Point Blockset User's Guide2.0 ed. Mathworks, 2001.
20. M. Coors, H. Keding, O. Luthje, and H. Meyr, "Fast bit-true simulation," in IEEE/ACM Des. Autom. Conf. 2001 (DAC 01), Las Vegas, US, Jun. 2001, pp. 708-713.
21. W. Sung and K. Kum, "Simulation-based word-length optimization method for fixed-point digital signal processing systems," IEEE Trans. Signal Process., vol. 43, pp. 3087-3090, Dec. 1995.
22. J. Toureilles, C. Nouet, and E. Martin, "A study on discrete wavelet transform implementation for a high level synthesis tool," in IX European Signal Process. Conf. (EUSIPCO 98), Rhodes, Greece, Sep. 1998, pp. 459-461.
23. C. Shi and R. Brodersen, "A perturbation theory on statistical quantization effects in fixed-point DSP with non-stationary input," in IEEE Int. Symp. Circuits Syst. (ISCAS 04), Vancouver, Canada, 2004.
24. B. Widrow, "Statistical analysis of amplitude quantized sampled-data systems," Trans. AIEE Appl. and Ind., vol. 79, pt. II, pp. 555-568, 1960.
25. A. Sripad and D. L. Snyder, "A necessary and sufficient condition for quantization error to be uniform and white," IEEE Trans. Acoust. Speech, Signal Process., vol. ASSP-25, no. 5, pp. 442-448, Oct. 1977.
26. C. Barnes, B. N. Tran, and S. Leung, "On the statistics of fixed-point roundoff error," IEEE Trans. Acoust. Speech, Signal Process., vol. ASSP-33, no. 3, pp. 595-606, 1985.
27. G. Constantinides, P. Cheung, and W. Luk, "Truncation noise in fixed-point SFGs," Electron. Lett., vol. 35, no. 23, pp. 2012-2014, Nov. 1999.
28. D. Menard, "Methodologie de Compilation D'Algorithmes de Traitement Du Signal Pour Les Processeurs en Virgule Fixe, Sous Contrainte de Precision," Ph.D. dissertaion, Univ. de Rennes I, Lannion, France, 2002.
29. A. Oppenheim and R. Schafer, Discrete Time Signal Processing, 2nd ed. Upper Saddle River, NJ: Prentice Hall, 1999.
30. K. Steiglitz, "Mathematical foundations of signal processing," in Handbook for Digital Signal Processing, S. Mitra and J. Kaiser, Eds. :WIley, 1993, pp. 57-100.
31. V. Madisetti, VLSI Digital Signal Processors, an Introduction to Rapid Prototyping and Design Synthesis. New York: IEEE Press, 1995.
32. R. Wilson, "SUIF: An infrastructure for research on parallelizing and optimizing compilers," Stanford University, Computer Systems Laboratory, Tech. Rep. CA 94305-4055, 1994.
33. L. Turner, D. Graham, and P. Denyer, "The analysis and implementation of digital filters using a special purpose CAD tool," IEEE Trans. Edu., vol. 32, pp. 287-297, Aug. 1989.
34. D. B. Johnson, "Finding all the elementary circuits of a directed graph," SIAM J. Computing, vol. 4, no. 1, pp. 77-84, Mar. 1975.
35. S. Mason and H. J. Zimmermann, Electron. Circuits, Signals and Syst. New York: Wiley, 1960.
36. T. Ojanper and R. Prasad, WCDMA : Towards IP Mobility and Mobile Internet. Reading, MA: Artech House, 2002, Universal Personal Communications Series.
37. T. Parks and C. Burrus, Digital Filter Design. New York: Wiley, 1987.