Low-power circuits for brain-machine interfaces

IEEE Transactions on Biomedical Circuits and Systems

Volumn 2, Issue 3, 2008, Pages 173-183

  Sarpeshkar, Rahul ^a   Wattanapanitch, Woradorn ^a   Arfin, Scott k ^a   Rapoport, Benjamin I ^a   Mandal, Soumyjiit ^a   Baker, Michael W ^a   Fee, Michale S ^b   Musallam, Sam ^c   Andersen, Richard A ^c  

^a Department of Electrical Engineering and Computer Science   (United States)

^b MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^c CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Brain machine interfaces; Low power; Prosthetics; Wireless neuroscience

Indexed keywords

BIOMEDICAL SIGNAL PROCESSING; BRAIN; BRAIN COMPUTER INTERFACE; ELECTRODES; ENERGY TRANSFER; NEUROLOGY; PROSTHETICS; TIMING CIRCUITS;

BRAIN-MACHINE INTERFACE; LOW POWER; LOW-POWER CIRCUIT; MACHINE INTERFACES; MICROPOWER; MULTIELECTRODE ARRAYS; PARKINSON'S DISEASE; POWER; ULTRA-LOW-POWER CIRCUITS; WIRELESS NEUROSCIENCE;

ENERGY EFFICIENCY;

EID: 56249116046     PISSN: 19324545     EISSN: None     Source Type: Journal    
DOI: 10.1109/TBCAS.2008.2003198     Document Type: Conference Paper

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