On the potentials of segment-based routing for NoCs

Proceedings of the International Conference on Parallel Processing

Volumn , Issue , 2008, Pages 594-603

  Mejia, A ^a   Flich, J ^a   Duato, J ^a  

^a UNIVERSITAT POLITÈCNICA DE VALÈNCIA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER NETWORKS; ELECTRIC NETWORK TOPOLOGY; EMBEDDED SYSTEMS; ETHERNET; INTEGRATED CIRCUITS; LOCAL AREA NETWORKS; MACHINE DESIGN; SWITCHING CIRCUITS; TOPOLOGY;

DESIGN TIMES; DYNAMIC CHANGES; DYNAMIC MECHANISMS; ENERGY REDUCTIONS; EXHAUSTIVE ANALYSIS; FAST COMPUTATIONS; HIGH VOLUME MANUFACTURING; INTER-CONNECTS; IRREGULAR TOPOLOGIES; LINK FAILURES; NETWORK INFLUENCES; NOC SYSTEMS; ON CHIPS; PERFORMANCE IMPACTS; RE-CONFIGURATIONS; RELIABLE PERFORMANCES; RESTRICTION POLICIES; SEGMENTATION PROCESSES; TRAFFIC PATTERNS; UNIFORM TRAFFICS; VIRTUALIZATION;

ROUTING ALGORITHMS;

EID: 55949125940     PISSN: 01903918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICPP.2008.56     Document Type: Conference Paper

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