Low-complexity binary morphology architectures with flat rectangular structuring elements

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 55, Issue 8, 2008, Pages 2216-2225

  Hedberg, Hugo ^a   Kristensen, Fredrik ^a   Owall, Viktor ^a  

^a LUND UNIVERSITY   (Sweden)

Author keywords

Application specific integrated circuit (ASIC); Binary; Dilation; Erosion; Field programmable gate array (FPGA); Hardware; Image processing; Morphology; Surveillance system

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER HARDWARE; EROSION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); IMAGE PROCESSING; IMAGE RESOLUTION; MORPHOLOGY; PIXELS;

BINARY; DILATION; HARDWARE ACCELERATORS; HARDWARE ARCHITECTURE; LOW-COMPLEXITY ARCHITECTURE; MORPHOLOGICAL EROSION; PROPOSED ARCHITECTURES; SURVEILLANCE SYSTEMS;

MEMORY ARCHITECTURE;

EID: 54749084321     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2008.918140     Document Type: Article

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