Register-constrained address computation in DSP programs

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 1998, Pages 929-930

  Basu, Anupam ^a   Leupers, Rainer ^a   Marwedel, Peter ^a  

^a TU DORTMUND UNIVERSITY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ADDRESS COMPUTATION; ADDRESS GENERATION UNITS; CODE OPTIMIZATION TECHNIQUE; DATA ARRAY; DSP ALGORITHM; FIXED NUMBERS; HEURISTIC TECHNIQUES;

HEURISTIC METHODS; SIGNAL PROCESSING;

ITERATIVE METHODS;

EID: 53649083395     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1998.655974     Document Type: Conference Paper

References (5)

1. C. Liem, P.Paulin, A. Jerraya: Address Calculation for Retar-getable Compilation and Exploration of Instruction-Set Ar-chitectures, 33rd Design Automation Conference (DAC), 1996
2. G. Araujo, A. Sudarsanam, S. Malik: Instruction Set Design and Optimizations for Address Computation in DSP Archi-tectures, 9th Int. Symp. on System Synthesis (ISSS), 1996
3. R. Leupers, A. Basu, P. Marwedel: Optimized Array Index Computation in DSP Programs, ASP-DAC, 1998
4. S. Liao, S. Devadas, K. Keutzer, S. Tjiang, A. Wang: Storage Assignment to Decrease Code Size, ACM SIGPLAN Confer-ence on Programming Language Design and Implementation (PLDI), 1995
5. R. Leupers, P. Marwedel: Algorithms for Address Assignment in DSP Code Generation, Int. Conf. on Computer-Aided De-sign (ICCAD), 1996