OpenMP-based parallelization on an MPCore multiprocessor platform - A performance and power analysis

Journal of Systems Architecture

Volumn 54, Issue 11, 2008, Pages 1019-1029

  Blume, H ^a   Livonius, J von ^a   Rotenberg, L ^a   Noll, T G ^a   Bothe, H ^b   Brakensiek, J ^b  

^a RWTH AACHEN UNIVERSITY   (Germany)

^b NOKIA   (Germany)

Author keywords

Multicore processors; Optimization; Parallelization; Power estimation

Indexed keywords

DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING; MULTIPROCESSING SYSTEMS; SIGNAL PROCESSING; SOFTWARE PROTOTYPING;

C-LEVEL; ESTIMATION ACCURACIES; INFLUENCING PARAMETERS; INSTRUCTION-LEVEL; MULTI-PROCESSOR ARCHITECTURES; MULTICORE PROCESSORS; OPTIMIZATION; PARALLELIZATION; PERFORMANCE-POWER RATIO; POWER ANALYSIS; POWER ESTIMATION; POWER MODELING; POWER-EFFICIENT; PROCESSOR CORES; PROGRAMMING MODELS; PROTOTYPING PLATFORMS;

MODAL ANALYSIS;

EID: 52949153284     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sysarc.2008.04.001     Document Type: Article

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