A general approach to control a Positive Buck-Boost converter to achieve robustness against input voltage fluctuations and load changes

PESC Record - IEEE Annual Power Electronics Specialists Conference

Volumn , Issue , 2008, Pages 2011-2017

  Boora, Arash A ^a,b   Zare, Firuz ^a,b   Ledwich, Gerard ^a,b   Ghosh, Arindam ^a,b  

^a IEEE

^b QUEENSLAND UNIVERSITY OF TECHNOLOGY   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

BOOST CONVERTERS; BUCK-BOOST CONVERTERS; CONTROL STRATEGIES; DC CONVERTERS; DEGREE OF FREEDOM; GENERAL APPROACH; INDUCTOR CURRENTS; INPUT VOLTAGES; MATHEMATICAL ANALYSES; OUTPUT VOLTAGES; SIMULATION RESULTS; STEADY-STATE CONDITIONS; SWITCHING STATES;

CONTROL SYSTEM STABILITY; CONTROL THEORY; DC-DC CONVERTERS; DYNAMIC ANALYSIS; ELECTRIC INVERTERS; POWER CONVERTERS; POWER ELECTRONICS; ROBUST CONTROL; ROBUSTNESS (CONTROL SYSTEMS); TURBULENT FLOW;

ELECTRIC CONVERTERS;

EID: 52349091574     PISSN: 02759306     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PESC.2008.4592239     Document Type: Conference Paper

References (6)

1. Chakraborty, Arindam; Khaligh, Alireza; Emadi, Ali; "Combination of Buck and Boost Modes to Minimize Transients in the Output of a Positive Buck-Boost Converter" IEEE Industrial Electronics, IECON 2006 - 32nd Annual Conference on Nov. 2006 Page(s):2372-2377
2. th IEEE 18-22 June 2006 Page(s):1-6
3. Sahu, B.; Rincon-Mora, G.A.; "A low voltage, dynamic, noninverting, synchronous buck-boost converter for portable applications" Power Electronics, IEEE Transactions on Volume 19, Issue 2, March 2004 Page(s):443 - 452
4. Weissbach, R.S.; Torres, K.M.; "A noninverting buck-boost converter with reduced components using a microcontroller" SoutheastCon 2001. Proceedings. IEEE 30 March-1 April 2001 Page(s):79 - 84 Digital Object Identifier 0.1109/SECON.2001.923091
5. Bosheng Sun; Zhiqiang Gao; "A DSP-based active disturbance rejection control design for a 1-kW H-bridge DC-DC power converter" Industrial Electronics, IEEE Transactions on Volume 52, Issue 5, Oct. 2005 Page(s):1271 - 1277
6. Garcera, G.; Figueres, E.; Pascual, M.; Benavent, J.M.; "Analysis and design of a robust average current mode control loop for parallel buck DC-DC converters to reduce line and load disturbance" Electric Power applications, IEE Proceedings-Volume 151, Issue 4, 7 July 2004 Page(s):414 - 424