Impact of tantalum composition in TaC/HfSiON gate stack on device performance of aggressively scaled CMOS devices with SMT and strained CESL

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2008, Pages 132-133

  Goto, M ^a   Tatsumura, K ^a   Kawanaka, S ^a   Nakajima, K ^a   Ichihara, R ^a   Yoshimizu, Y ^a   Onoda, H ^a   Nagatomo, K ^a   Sasaki, T ^a   Fukushima, T ^a   Nomachi, A ^a   Inumiya, S ^a   Oguma, H ^a   Miyashita, K ^a   Harakawa, H ^a   Inaba, S ^a   Ishida, T ^a   Azuma, A ^a   Aoyama, T ^a   Koyama, M ^a   Eguchi, K ^a   Toyoshima, Y ^a   more..

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

TANTALUM; TRANSITION METALS;

DEVICE PERFORMANCES; GATE STACKS; SCALED CMOS; VLSI TECHNOLOGIES;

TECHNOLOGY;

EID: 51949101327     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2008.4588591     Document Type: Conference Paper

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