A GSM/EDGE transmitter in 0.13- μm CMOS using offset phase locked loop and direct conversion architecture

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2008, Pages 581-584

  Chen, S F ^a   Lee, Y B ^a   Tzeng, Bosen ^a   Tang, C C ^a   Chiu, Charles ^a   Yu, Rickey ^a   Lin, Ovid ^a   Ke, L W ^a   Wu, C P ^a   Yeh, C W ^a   Chen, P Y ^a   Dehng, G K ^a  

^a MEDIATEK INC   (Taiwan)

Author keywords

CMOS; DCT; Divider; EDGE; GSM; Modulator; OPLL; PGA; Transceiver; VCO

Indexed keywords

DIGITAL INTEGRATED CIRCUITS; ELECTRONICS INDUSTRY; MODULATION; PHASE LOCKED LOOPS; PHASE SHIFT; POWER SPECTRUM; RADIO WAVES; TRANSMITTERS;

BAND EDGES; CMOS; CURRENT CONSUMPTIONS; DCT; DIRECT-CONVERSION ARCHITECTURE; DIVIDER; DYNAMIC RANGE; EDGE; FRACTIONAL-N SYNTHESIZERS; GSM; GSM/EDGE; LDO REGULATORS; MODULATION SPECTRUM; MODULATOR; OFFSET PHASE-LOCKED LOOP; OPLL; OUTPUT POWERS; PGA; QFN PACKAGING; RADIO FREQUENCY INTEGRATED CIRCUITS; RMS ERRORS; RMS PHASE; TRANSCEIVER; VCO;

INTEGRATED CIRCUITS;

EID: 51849117801     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2008.4561504     Document Type: Conference Paper

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