Active mitigation of induced phase distortion in a GSM SoC

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2008, Pages 17-20

  Eliezer, Oren ^a   Staszewski, Bogdan ^a   Bhatara, Sumeer ^a   Bashir, Imran ^a   Balsara, Poras T ^b  

^a TEXAS INSTRUMENTS   (United States)

^b UNIVERSITY OF TEXAS AT DALLAS   (United States)

Author keywords

All Digital PLL (ADPLL); Digital RF processor (DRP); Interference mitigation; Phase trajectory error (PTE); System on chip (SOC)

Indexed keywords

ALL-DIGITAL PLL (ADPLL); DIGITAL PLL; DIGITAL RF PROCESSOR (DRP); DIGITAL-RF; GSM SYSTEM; HIGH FREQUENCY SIGNALS; INTERFERENCE MITIGATION; MODULATION DISTORTION; ON-CHIP CIRCUITRY; PHASE DISTORTIONS; PHASE TRAJECTORY ERROR (PTE); RADIO FREQUENCY INTEGRATED CIRCUITS; REFERENCE CLOCKS; SELF INTERFERENCES; SYSTEM-ON-CHIP (SOC);

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; DIGITAL ARITHMETIC; DIGITAL INTEGRATED CIRCUITS; ELECTRONICS INDUSTRY; JITTER; MODULATION; PHASE LOCKED LOOPS; PROGRAMMABLE LOGIC CONTROLLERS; RADIO WAVES; TRANSMITTERS;

INTEGRATED CIRCUITS;

EID: 51849095297     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2008.4561376     Document Type: Conference Paper

References (4)

1. Y. Tsfaty, O. Eliezer, R. Katz et al. "Enhancement of Coexistence Performance in a DRP Based Multi-Radio Environment of a Mobile Phone", Proc. of IEEE Dallas/CAS Workshop (DCAS-07), pp. 51-41 Nov. 2007.
2. A. Hajimiri and Thomas H. Lee, "A General Theory of Phase Noise in Electrical Oscillators", IEEE Journal of Solid State Circuits, vol. 33, no. 2, pp. 179-194, Feb. 1998.
3. R. B. Staszewski, J. Wallberg, S. Rezeq, et al., "All-digital PLL and Transmitter for Mobile Phones," IEEE Journal of Solid-State Circuits, vol. 40, issue 12, pp. 2469-2482, Dec. 2005.
4. O. Eliezer, I. Bashir, R. B. Staszewski, and P. T. Balsara, "Built-in Self Testing of a DRP-Based GSM Transmitter", Proc. of IEEE RFIC Symposium. June 2007.