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Volumn , Issue , 2008, Pages 1248-1251

Reconfigurable two-dimensional pipeline FFT processor in OFDM cognitive radio systems

Author keywords

[No Author keywords available]

Indexed keywords

COGNITIVE SYSTEMS; DATA STORAGE EQUIPMENT; FAST FOURIER TRANSFORMS; FREQUENCY ALLOCATION; FREQUENCY DIVISION MULTIPLEXING; NETWORKS (CIRCUITS); ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; PIPELINES; RADIO SYSTEMS; TECHNICAL PRESENTATIONS; TWO DIMENSIONAL;

EID: 51749088127     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2008.4541651     Document Type: Conference Paper
Times cited : (10)

References (10)
  • 3
    • 31644437944 scopus 로고    scopus 로고
    • A power-scalable reconfigurable FFT/IFFT IC based on a multi-processor ring
    • Feb
    • Guichang Zhong, Fan Xu, Willson, A.N., "A power-scalable reconfigurable FFT/IFFT IC based on a multi-processor ring," IEEE Journal of Solid-State Circuits, vol.41, issue 2, pp.483-495, Feb. 2006.
    • (2006) IEEE Journal of Solid-State Circuits , vol.41 , Issue.2 , pp. 483-495
    • Zhong, G.1    Xu, F.2    Willson, A.N.3
  • 10
    • 27144512836 scopus 로고    scopus 로고
    • A low clock frequency FFT core implementation for multiband full-rate ultra-wideband (UWB) receivers
    • Aug
    • R. Simon Sherratt, Oswaldo Cadenas, and Nomita Goswami, "A low clock frequency FFT core implementation for multiband full-rate ultra-wideband (UWB) receivers," IEEE Trans. on Consumer Electronics, vol. 51, issue 3, pp. 798-802, Aug. 2005.
    • (2005) IEEE Trans. on Consumer Electronics , vol.51 , Issue.3 , pp. 798-802
    • Simon Sherratt, R.1    Cadenas, O.2    Goswami, N.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.