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Volumn , Issue , 2008, Pages 18-23

Functionally linear decomposition and synthesis of logic circuits for FPGAs

Author keywords

Decomposition; Gaussian elimination; Linearity; Logic synthesis

Indexed keywords

COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; INDUSTRIAL ENGINEERING; SWITCHING CIRCUITS; SWITCHING THEORY;

EID: 51549094240     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2008.4555774     Document Type: Conference Paper
Times cited : (4)

References (17)
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    • (1977) Inf. Contr , vol.33 , Issue.2 , pp. 142-165
    • Karpovsky, M.1
  • 7
    • 51549109435 scopus 로고    scopus 로고
    • M. Perkowski and S. Grygiel, A Survey of Literature on Function Decomposition, A Final Report for Summer Faculty Research Program, Wright Laboratory, Sponsored by Air Force Office of Scientific Research, Boiling Air Force Base, DC and Wright Laboratory, September 1994.
    • M. Perkowski and S. Grygiel, "A Survey of Literature on Function Decomposition," A Final Report for Summer Faculty Research Program, Wright Laboratory, Sponsored by Air Force Office of Scientific Research, Boiling Air Force Base, DC and Wright Laboratory, September 1994.
  • 8
    • 0026971476 scopus 로고
    • A New Approach to Decomposition of Incompletely Specified Multi-Output Functions Based on Graph Coloring and Local Transformations and its Applications to FPGA Mapping
    • W. Wan and M. A. Perkowski, "A New Approach to Decomposition of Incompletely Specified Multi-Output Functions Based on Graph Coloring and Local Transformations and its Applications to FPGA Mapping," Proc. Of. European DAC, 1992, pp. 230-235.
    • (1992) Proc. Of. European DAC , pp. 230-235
    • Wan, W.1    Perkowski, M.A.2
  • 11
    • 0027271156 scopus 로고
    • BDD-based Decomposition of Logic Functions with Application to FPGA Synthesis
    • th DAC, 1993, pp. 642-647.
    • (1993) th DAC , pp. 642-647
    • Lai, Y.1    Pedram, M.2    Sastry, S.3
  • 14
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    • Graph-based algorithms for Boolean function manipulation
    • August
    • R. E. Bryant, "Graph-based algorithms for Boolean function manipulation," IEEE Trans. On Computers, vol. C-35, August 1986, pp. 677-691.
    • (1986) IEEE Trans. On Computers , vol.C-35 , pp. 677-691
    • Bryant, R.E.1
  • 15
    • 33846645254 scopus 로고    scopus 로고
    • Berkeley Logic Synthesis Group, December Release. URL
    • Berkeley Logic Synthesis Group, ABC: A System for Sequential Synthesis and Verification, December 2005 Release. URL: http://www.eecs.berkeley.edu/ ̃alanmi/abc.
    • (2005) ABC: A System for Sequential Synthesis and Verification
  • 16
    • 0025503056 scopus 로고
    • Exploiting Communication Complexity for Multilevel Logic Synthesis
    • Oct
    • TT Hwang, R. M. Owens, and M. J. Irwin, "Exploiting Communication Complexity for Multilevel Logic Synthesis," IEEE Trans. On CAD, vol. 9, No. 10, Oct. 1990, pp. 1017-1027.
    • (1990) IEEE Trans. On CAD , vol.9 , Issue.10 , pp. 1017-1027
    • Hwang, T.T.1    Owens, R.M.2    Irwin, M.J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.