A parameterized design framework for hardware implementation of particle filters

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn , Issue , 2008, Pages 1449-1452

  Saha, Sankalita ^a   Bambha, Neal K ^b   Bhattacharyya, Shuvra S ^a  

^a UNIVERSITY OF MARYLAND   (United States)

^b U S ARMY RESEARCH LABORATORY   (United States)

Author keywords

Field programmable gate arrays; Parallel architectures; Recursive estimation

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS; PARALLEL ARCHITECTURES; PARTICLE FILTERING; RECURSIVE ESTIMATION;

ACOUSTIC SIGNAL PROCESSING; ACOUSTICS; AIR FILTERS; APPLICATIONS; COMPUTATIONAL COMPLEXITY; COMPUTER NETWORKS; DISTRIBUTED COMPUTER SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; NONLINEAR FILTERING; REAL TIME SYSTEMS; SIGNAL PROCESSING; SPEECH; TARGET TRACKING; WAVE FILTERS;

SIGNAL FILTERING AND PREDICTION;

EID: 51449109106     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICASSP.2008.4517893     Document Type: Conference Paper

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