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IEEE International Electron Devices Meeting Technical Digest
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Ovonic unified memory - A high-performance nonvolatile memory technology for stand-alone memory and embedded applications
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Feb.
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M. Gill, T. Lowrey, and J. Park, "Ovonic unified memory - a high-performance nonvolatile memory technology for stand-alone memory and embedded applications," IEEE International Solid-State Circuits Conference Digest of Technical Papers, vol. 1, pp. 202-459, Feb. 2002.
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th European Solid-State Device Research conference, pp. 293-296, Sept. 2004.
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th European Solid-state Device Research Conference
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Ottogalli, F.1
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An 8Mb demonstrator for high-density 1.8V phase-change memories
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June
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F. Bedeschi, C. Resta, O. Khouri, E. Buda, L. Costa, M. Ferraro, F.Pellizzer, F. O. A. Pirovano, M. Tosi, R. Bez, R. Gastaldi, and G. Casagrande, "An 8Mb Demonstrator for High-Density 1.8V Phase-Change Memories," Symposium on VLSI Circuit Digest of Technical Papers, pp. 442-445, June 2004.
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Symposium on VLSI Circuit Digest of Technical Papers
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Chalcogenide-based non-volatile memory technology
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J. Maimon, E. Spall, R. Quinn, and S. Schnur, "Chalcogenide-based non-volatile memory technology," IEEE Proceedings on Aerospace Conference, vol. 5, pp. 2289-2294, March 2001.
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th European Solid-State Circuits Conference, pp. 207-210, Sept. 2004.
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Pirovano, A.13
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Reliability study of phase-change non-volatile memories
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Sept.
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A. Pirovano, A. Redaelli, F. Pellizzer, F. Ottogalli, M. Tosi, D. Ielmini, A. L. Lacaita, and R. Bez, "Reliability Study of Phase-Change Non-Volatile Memories," IEEE Transactions on Device and Materials Reliability, vol. 4, no. 3, pp. 422-427, Sept. 2004.
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Dec.
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J. D. Maimon, K. K.Hunt, L. Burcin, and J. Rodgers, "Chalcogenide Memory Array: Characterization and Radiation Effects," IEEE Transactions on Nuclear Science, vol. 50, no. 6, pp. 1878-1884, Dec. 2003.
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Oct.
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Y. Hwangand, J. Hong, S. Lee, S. Ahn, G. Jeong, G. Koh, H. Kim, W. Jeong, S. Lee, J. Park, K. Ryoo, H. Horiiand, Y. Ha, J. Yi, W. Cho, Y. Kim, K. Lee, S. Joo, S. Park, U. Jeong, H. Jeong, and K. Kim, "Phase-change chalcogenide nonvolatile RAM completely based on CMOS technology," International Symposium on VLSI Technology, System and Applications, pp. 29-31, Oct. 2003.
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International Symposium on VLSI Technology, System and Applications
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Hwangand, Y.1
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Progress on design and demonstration of the 4Mb chalcogenide-based random access memory
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Nov.
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S. Ramaswamy, K. Hunt, D. Maimon, B. Li, A. Bumgarner, J. Rodgers, and L. Burcin, "Progress on Design and Demonstration of the 4Mb Chalcogenide-based Random Access Memory," IEEE Symposium on Non-Volatile Memory Technology, pp. 137-142, Nov. 2004.
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33748567513
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Programming and disturb characteristics in non volatile phase change memories
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Aug.
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A. L. Lacaita, A. Redaelli, D. Ielmini, M. Tosi, F. Pellizzer, A. Provano, and R. Bez, "Programming and disturb characteristics in Non Volatile Phase Change Memories," IEEE Non-Volatile Semiconductor Memory Workshop, pp. 26-27, Aug. 2004.
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IEEE Non-volatile Semiconductor Memory Workshop
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Universal HSPICE model for chalcogenide based phase change memory elements
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Nov.
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X. Wei, L. Shi, W. Rajan, R. Zhao, B. Quek, X. Miao, and T. Chong, "Universal HSPICE Model for Chalcogenide Based Phase Change Memory Elements," IEEE Symposium on Non-Volatile Memory Technology, pp. 88-91, Nov. 2004.
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Wei, X.1
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Detecting faults in the peripheral circuits and an evaluation of SRAM tests
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Oct.
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A. van de Goor, S. Hamdioui, and R. Wadsworth, "Detecting faults in the peripheral circuits and an evaluation of SRAM tests," International Test Conference, pp. 114-123, Oct. 2004.
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