Process development and reliability evaluation for inline Package-on-Package (PoP) assembly

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2008, Pages 2005-2010

  Sjoberg, Jonas ^a   Geiger, David A ^b   Shangguan, Dongkai ^b  

^a Flextronics International   (Malaysia)

^b FLEXTRONICS INTERNATIONAL   (United States)

Author keywords

Mechanical and thermo mechanical reliability; PoP; Stacking

Indexed keywords

COMPUTER NETWORKS; ELECTROMAGNETIC WAVE EMISSION; ELECTROMAGNETIC WAVES; MINIATURE INSTRUMENTS; POLLUTION; PRINTED CIRCUIT MANUFACTURE; PRINTED CIRCUITS; RELIABILITY;

ELECTRONIC COMPONENTS; MECHANICAL AND THERMO MECHANICAL RELIABILITY; POP; STACKING;

PRINTED CIRCUIT BOARDS;

EID: 51349086049     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2008.4550259     Document Type: Conference Paper

References (6)

1. Geiger, D., Shangguan, D., Tam, S., and Rooney, D., "Package Stacking in SMT for 3D PCB Assembly," Proceedings of IEEE IEMT 2003 (Paper S207P6), San Jose, CA, July 2003.
2. Shangguan, D., "Package Stacking for 3D SMT Assembly," Global SMT &Packaging, October 2004.
3. Geiger, D.A., Sjoberg, J., Wong, P., and Shangguan D., "Study of Assembly Processes for Solder Flip Chips on FR-4 Substrates," Proceedings of APEX 2003, Anaheim, CA, March 2003.
4. Geiger D.A., Sjoberg J., Wong P., and Shangguan D., "Study of Assembly Processes for Flip Chips on Substrates," Advanced Packaging, Nov. 2003,
5. Geiger D.A., Sjoberg J., Shangguan D., and Castello T., "Lead-Free Solder Flip Chips on FR-4 Substrates with Different PCB Surface Finishes, Underfills and Fluxes," Proceedings of Semicon West 2004, San Jose, CA.
6. Geiger D.A., Sjoberg J., Shangguan D., and Castello T., "Package on Package (PoP) Process Development and Reliability Evaluation" Proceedings of Pan Pacific 2007.