Data access optimizations for highly threaded multi-core CPUs with multiple memory controllers

IPDPS Miami 2008 - Proceedings of the 22nd IEEE International Parallel and Distributed Processing Symposium, Program and CD-ROM

Volumn , Issue , 2008, Pages

  Hager, Georg ^a   Zeiser, Thomas ^a   Wellein, Gerhard ^a  

^a UNIVERSITY OF ERLANGEN NUREMBERG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); COMPUTER NETWORKS; DISTRIBUTED PARAMETER NETWORKS;

MEMORY CONTROLLERS; MULTI CORES; PARALLEL AND DISTRIBUTED PROCESSING;

DATA STORAGE EQUIPMENT;

EID: 51049115984     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2008.4536341     Document Type: Conference Paper

References (10)

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