Further enhancement of electro-migration resistance by combination of self-aligned barrier and copper wiring encapsulation techniques for 32-nm nodes and beyond

2008 IEEE International Interconnect Technology Conference, IITC

Volumn , Issue , 2008, Pages 117-119

  Kudo, H ^a   Haneda, M ^a   Tabira, T ^a   Sunayama, M ^a   Ohtsuka, N ^a   Shimizu, N ^a   Ochimizu, H ^a   Tsukune, A ^a   Suzuki, T ^a   Kitada, H ^a   Amari, S ^a   Matsuyama, H ^a   Owada, T ^a   Watatani, H ^a   Futatsugi, T ^a   Nakamura, T ^a   Sugii, T ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER NETWORKS; MANGANESE COMPOUNDS;

CU WIRING; INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE; SELF-ALIGNED BARRIER;

CMOS INTEGRATED CIRCUITS;

EID: 50949106893     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.2008.4546942     Document Type: Conference Paper

References (7)

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4. Y. Hayashi, et al., MRS Adv. Metallization Conf., 2006, p132.
5. H. Kudo, et al., Proc. IITC, 2007, p178.
6. H. Sakai, et al., MRS Adv. Metallization Conf., 2006, p33.
7. H. Matsuyama, et al., Proc. IRPS, 2007, p638.