A high speed CMOS transmitter and rail-to-rail receiver

Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008

Volumn , Issue , 2008, Pages 67-70

  Zhang, Feng ^a   Yang, Zongren ^a   Feng, Wei ^a   Cui, Hao ^a   Huang, Lingyi ^a   Hu, Weiwu ^a  

^a INSTITUTE OF COMPUTING TECHNOLOGY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER NETWORKS; ELECTRIC NETWORK ANALYSIS; ELECTRIC POWER TRANSMISSION; ELECTRONICS ENGINEERING; LOGIC CIRCUITS; RAILS; SPEED; TECHNICAL PRESENTATIONS;

HIGH SPEEDS; INTERNATIONAL SYMPOSIUM; TRANSMITTER AND RECEIVER;

CMOS INTEGRATED CIRCUITS;

EID: 50649125148     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DELTA.2008.32     Document Type: Conference Paper

References (9)

1. M. Galles, et al., Spider: a high-speed network interconnect, IEEE Micro Jan. Feb. 1997, vol. 17, no. 1, p. 34-9
2. J. Kuskin, et al., "The Stanford FLASH Multiprocessor," Proceedings of the 21st International Symposium on Computer Architecture. Chicago, IL, Apr. 1994, pp. 302-13
3. Jaeseo Lee IX et al. Design and Implementation of CMOS LVDS 2.5Gb/s Transmitter and 1.3Gb/s Receiver for Optical Interconnections. Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on. Volume: 4, On page(s): 702-705 vol. 4.
4. IEEE Standard for Low-Voltage Differential Signals(LVDS) for Scalable Coherent Interface(SCI), 1596.3 SCI-LVDS Standard, IEEE Std. 1596.3-1996, 1994.
5. Electrical characteristics of low-voltage differential-signalling(LVDS) interface circuits, TIA/EIA-644, National Semiconductor Corp., ANSI/TIA/EIA, 1996.
6. Andrea Boni, Andrea Pierazzi, Davide Vecchi, "LVDS I/O Interface for Gb/s-per-Pin Operation in .35μm CMOS," IEEE J. Solid-state circuits. vol. 36, No. 4, pp. 706-711, April 2001.
7. B. Young. An SOI CMOS LVDS driver and receiver pair. IEEE Symposium on VLSI Circuits, pp, 153-154, 2001.
8. H.W. Johnson and M. Graham, High-Speed Digital Design, A Handbook of Black Magic. Englewood Cliffs, NJ: Prentice Hall, 1993.
9. Gunjan Mandal, Pradip Mandal. Low-power LVDS Receiver for 1.3Gbps Physical layer(PHY) interface. Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on. vol. 3. pp. 2180-2183