A VLSI architecture for a run-time multi-precision reconfigurable booth multiplier

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn , Issue , 2007, Pages 975-978

  Shun, Zhou ^a   Pfänder, Oliver A ^b   Pfleiderer, Hans Jörg ^b   Bermak, Amine ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

^b UNIVERSITY OF ULM   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

BOOTH MULTIPLIERS; RE-CONFIGURABLE;

FREQUENCY MULTIPLYING CIRCUITS;

EID: 50649085679     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2007.4511155     Document Type: Conference Paper

References (10)

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