A double channel normally-off SiC JFET device with ultra-low on-state resistance

IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)

Volumn 16, Issue , 2004, Pages 309-312

  Udrea, F ^a   Mihaila, A ^a   Rashid, S J ^a   Amaratunga, G A J ^a   Takeuchi, Y ^b   Kataoka, M ^b   Malhan, R K ^b  

^a UNIVERSITY OF CAMBRIDGE   (United Kingdom)

^b DENSO CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DOPING (ADDITIVES); ELECTRIC BREAKDOWN; ELECTRIC RESISTANCE; EPITAXIAL GROWTH; GATES (TRANSISTOR);

BLOCKING VOLTAGE; DRIFT DOPING LEVELS; INVERSION LAYER MOBILITY;

JUNCTION GATE FIELD EFFECT TRANSISTORS;

EID: 5044220526     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/wct.2004.240034     Document Type: Conference Paper

References (10)

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