An integrated system for logic controller implementation using FPGAs

IECON Proceedings (Industrial Electronics Conference)

Volumn , Issue , 2006, Pages 195-200

  Silva, Celso F ^a   Quintáns, Camilo ^a   Lago, Jose M ^a   Mandado, Enrique ^a  

^a UNIVERSITY OF VIGO   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER CONTROL SYSTEMS; ELECTRONICS INDUSTRY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INDUSTRIAL ELECTRONICS; INDUSTRIAL ENGINEERING; INTEGRATED CONTROL; INTEGRATED OPTICS; PREDICTIVE CONTROL SYSTEMS;

ANNUAL CONFERENCE; DESIGN AUTOMATION; DESIGN PERFORMANCES; EVENTS DETECTION; INDUSTRIAL COMPUTERS; INDUSTRIAL PROJECTS; INTEGRATED SYSTEMS; LOGIC CONTROLLERS; PARALLEL CONTROL; RECONFIGURABLE DEVICES;

PROGRAMMABLE LOGIC CONTROLLERS;

EID: 50249154715     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IECON.2006.347397     Document Type: Conference Paper

References (10)

1. International Standard of Programmable Controllers, Part 3: Programming Languages, International Electrotechnical Comision, Std. IEC-1131-3.1992.
2. R. W. Lewis, Programming industrial control systems using IEC 1131-3, IEE Control Engineering Series, 1998.
3. E. Mandado, J. Marcos, C. F. Silva, and J. I. Armesto, Autómatas programables. Entorno y aplicaciones, Thomson Learning Paraninfo, 2005, pp. 243-318.
4. J. Pardey and M. Bolton, "Logic synthesis of synchronous parallel controllers," in Proceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors, 14-15 Oct. 1991, pp. 454-457.
5. J. Biesenack, et. al. "The Siemens High-Level Synthesis System CALLAS," in IEEE Trans. on VLSI, vol. 1, no. 3, Sept. 1993, pp. 233-243.
6. J. T. Welch, and J. Carletta. "A Direct Mapping FPGA Architecture for Industrial Process Control Applications," in Proceedings of the IEEE International Conference on Computer Design: VLSI in Computers & Processors, 2000, pp. 595-598.
7. IEEE Standard VHDL Language Reference Manual, IEEE Std. 1076-2002.
8. T. Murata, "Petri nets: Properties, analysis and applications," Proc. IEEE, vol. 77(4), pp. 541-580, April 1989.
9. J. M. Fernandes, M. Adamski and A. J. Proença. "VHDL generation from hierarchical Petri net specifications of parallel controllers," IEE Proceedings online no. 19970845. IEE Proc -Comput Digit Tech, vol. 144, No 2, March 1997, pp. 127-137.
10. M. Wegrzyn, M. A. Adamski, J. L. Monteiro. "The application of reconfigurable logic to controller design," Control Engineering Practice, vol. 6, Issue 7, July 1998, pp. 879-887.