Program disturb phenomenon by DIBL in MLC NAND flash device

2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, Proceedings, NVSMW/ICMTD

Volumn , Issue , 2008, Pages 5-7

  Oh, Dongyean ^a   Lee, Seungchul ^a   Lee, Changsub ^a   Song, Jaihyuk ^a   Lee, Woonkyung ^a   Choi, Jeonghyuk ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

DIBL(drain induced barrier lowering); Local self boosting; Program disturb; Short channel effect

Indexed keywords

CELLS; CYTOLOGY; ELECTRIC CONDUCTIVITY; HOT ELECTRONS; SEMICONDUCTOR MATERIALS; SEMICONDUCTOR STORAGE; TECHNOLOGY;

CHANNEL POTENTIAL; CUT-OFF; DIBL EFFECTS; DIBL(DRAIN-INDUCED BARRIER LOWERING); DRAIN BIAS; DRAIN-INDUCED BARRIER LOWERING; HIGH-DENSITY; INTERNATIONAL CONFERENCES; LOCAL SELF-BOOSTING; MEASUREMENT RESULTS; MEMORY TECHNOLOGY; MLC NAND; NON-VOLATILE; PROGRAM DISTURB; PUNCH-THROUGH; SEMICONDUCTOR MEMORIES; SHORT CHANNEL EFFECT; SHORT CHANNELS;

MOSFET DEVICES;

EID: 50249139679     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NVSMW.2008.7     Document Type: Conference Paper

References (3)

1. D-Y Oh et al., "A New Self-Boosting Phenomenon by Source/Drain Depletion Cut-off in NAND Flash Memory", IEEE NVSMW, pp.39-41, 2007.
2. K-D Suh et al., "A 3.3V 32Mb NAND flash memory with incremental step pulse programming scheme", ISSCC Tech.Dig., pp.128-129, 1995.
3. T-S Jung et al., "A 3.3V 128Mb Mult-Level NAND Flash Memory for Mass