Power-aware automatic constraint generation for FPGA based real-time video processing systems

25th Norchip Conference, NORCHIP

Volumn , Issue , 2007, Pages

  Lawal, Najeem ^a   Thörnberg, Benny ^a   O'Nils, Mattias ^a  

^a MID SWEDEN UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC PROGRAMMING; CHLORINE COMPOUNDS; DATA STORAGE EQUIPMENT; ELECTRIC POWER UTILIZATION; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); POWER GENERATION; VIDEO SIGNAL PROCESSING;

AUTOMATIC GENERATION; DEVELOPMENT TIME; DYNAMIC POWER; EMBEDDED DSP; EMBEDDED MEMORIES; FPGA IMPLEMENTATIONS; LOWER-POWER CONSUMPTION; MEMORY MAPPING; ONE STEP; PLACEMENT AND ROUTING; POWER-AWARE; PROGRAMMABLE ARCHITECTURES; PROGRAMMING MODELS; REAL-TIME VIDEO PROCESSING; RESOURCE UTILIZATIONS;

REAL TIME SYSTEMS;

EID: 50249090387     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NORCHP.2007.4481054     Document Type: Conference Paper

References (14)

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