메뉴 건너뛰기




Volumn , Issue , 2007, Pages 134-139

New tool support and architectures in adaptive reconfigurable computing

Author keywords

Dynamic and partial reconfiguration; FPGA; Reconfigurable hardware

Indexed keywords

ADAPTIVE SYSTEMS; ARCHITECTURE; LSI CIRCUITS; MECHANISMS; PROGRAMMABLE LOGIC CONTROLLERS;

EID: 50149118862     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSISOC.2007.4402486     Document Type: Conference Paper
Times cited : (8)

References (14)
  • 1
    • 84963935808 scopus 로고    scopus 로고
    • JBits Design Abstractions
    • C. Patterson, S. Guccione, "JBits Design Abstractions", In FCCM 2001, pp 251-252.
    • (2001) In FCCM , pp. 251-252
    • Patterson, C.1    Guccione, S.2
  • 2
    • 84857769139 scopus 로고    scopus 로고
    • A. Donlin, Applications, design tools and low power issues in FPGA reconfiguration, chapter 21 in Designing Embedded Processors, edited by J. Henkel and S. Parameswaram, Springer, 2007, pp 513-541.
    • A. Donlin, "Applications, design tools and low power issues in FPGA reconfiguration", chapter 21 in "Designing Embedded Processors", edited by J. Henkel and S. Parameswaram, Springer, 2007, pp 513-541.
  • 3
    • 0002879169 scopus 로고    scopus 로고
    • JHDL-An HDL for Reconfigurable Systems
    • P. Bellows, B. Hutchings, "JHDL-An HDL for Reconfigurable Systems", In FCCM 1998, pp. 175-184.
    • (1998) In FCCM , pp. 175-184
    • Bellows, P.1    Hutchings, B.2
  • 5
    • 50149087921 scopus 로고    scopus 로고
    • B. Blodget, S. McMillan: A lightweight approach for embedded reconfiguration of FPGAs, DATE'03, Munich Germany
    • B. Blodget, S. McMillan: "A lightweight approach for embedded reconfiguration of FPGAs", DATE'03, Munich Germany
  • 6
    • 50149094877 scopus 로고    scopus 로고
    • J. Becker, M. Hübner, M. Ullmann: Power Estimation and Power Measurement of Xilinx Virtex FPGAs: Trade-offs and Limitations, SBCCI03, Sao Paulo, Sep. 03
    • J. Becker, M. Hübner, M. Ullmann: "Power Estimation and Power Measurement of Xilinx Virtex FPGAs: Trade-offs and Limitations", SBCCI03, Sao Paulo, Sep. 03
  • 11
    • 84886210803 scopus 로고    scopus 로고
    • Physical 2D Morphware and Power Reduction Methods for Everyone
    • April, Schloss Dagstuhl
    • J. Becker, M. Hübner, K. Paulsson: "Physical 2D Morphware and Power Reduction Methods for Everyone", Dagstuhl Seminar, April 2006, Schloss Dagstuhl
    • (2006) Dagstuhl Seminar
    • Becker, J.1    Hübner, M.2    Paulsson, K.3
  • 12
    • 50149086337 scopus 로고    scopus 로고
    • Model and Methodology for the Synthesis of Heterogeneous and Partially Reconfigurable Systems
    • Long Beach, CA, USA
    • Dittmann, Florian; Götz, Marcelo; Rettberg, Achim: "Model and Methodology for the Synthesis of Heterogeneous and Partially Reconfigurable Systems". In: Proceedings of the Reconfigurable Architecture Workshop, Long Beach, CA, USA 2007
    • (2007) Proceedings of the Reconfigurable Architecture Workshop
    • Dittmann, F.1    Götz, M.2    Rettberg, A.3
  • 14
    • 34548363775 scopus 로고    scopus 로고
    • Using Partial-Run-Time Reconfigurable Hardware to accelerate Video Processing in Driver Assistance Systems
    • Nice, France, April 16-20
    • Claus, C., Zeppenfeld, J., Müller, F., Stechele, W.: " Using Partial-Run-Time Reconfigurable Hardware to accelerate Video Processing in Driver Assistance Systems", Proceedings of DATE 2007, Nice, France, April 16-20, 2007
    • (2007) Proceedings of DATE
    • Claus, C.1    Zeppenfeld, J.2    Müller, F.3    Stechele, W.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.