A VHDL based approach for fast and accurate energy consumption estimations

2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC

Volumn , Issue , 2007, Pages 276-279

  Marcon, César A M ^a   Johann Filho, Sérgio ^a   Hessel, Fabiano P ^a  

^a PONTIFICAL CATHOLIC UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

Author keywords

[No Author keywords available]

Indexed keywords

ABSTRACTING; EMBEDDED SYSTEMS; ENERGY CONSERVATION; ENERGY POLICY; KETONES; LSI CIRCUITS; PROGRAMMABLE LOGIC CONTROLLERS; SPECIFICATIONS;

ABSTRACTION LEVELS; CELL LIBRARIES; DESIGN EFFORTS; DESIGN PHASE; DESIGN TIME; ENERGY CONSUMPTION; HIGH-QUALITY; INTERNATIONAL CONFERENCES; POWER ESTIMATIONS; VERY LARGE-SCALE INTEGRATION;

ESTIMATION;

EID: 50149085772     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSISOC.2007.4402511     Document Type: Conference Paper

References (4)

1. Farid Najm. A Survey of Power Estimation Techniques in VLSI Circuits. IEEE Transactions on VLSI Systems, v. 2, n. 4, p. 446-455, Dec. 1994.
2. C. Marcon et al. Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs. IFIP VLSI-SOC, v. 1, p. 391-396, 2005.
3. Mentor Graphics. Leonardo Spectrum Datasheet. Available at www.mentor.com/products/fpga_pld/synthesis/leonardo_spectrum, 2007.
4. F. Moraes et al. HERMES: an infrastructure for low area overhead packet-switching networks on chip. VLSI the Integration Journal, v. 38, n. 1, p. 69-93, Oct. 2004.