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Volumn , Issue , 2007, Pages 907-910

A novel RF induced DC power supply system for integrated ubiquitous micro sensor devices

Author keywords

Energy harvesting; MEMS; Micro generator; Power supply system; Ubiquitous sensor

Indexed keywords

ACTUATORS; CAPACITANCE; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; ELECTRIC POWER DISTRIBUTION; ELECTRIC POWER MEASUREMENT; ELECTRIC POWER SYSTEMS; ELECTRIC POWER TRANSMISSION NETWORKS; ELECTRIC POWER UTILIZATION; ELECTROMAGNETISM; ELECTRON BEAM LITHOGRAPHY; ELECTRONIC EQUIPMENT MANUFACTURE; MICROSENSORS; MICROSYSTEMS; NETWORKS (CIRCUITS); OPTICAL DESIGN; REACTIVE ION ETCHING; TELECOMMUNICATION EQUIPMENT; TRANSDUCERS; VOLTAGE REGULATORS; WAVE ENERGY CONVERSION; WIRELESS SENSOR NETWORKS;

EID: 50049117474     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SENSOR.2007.4300278     Document Type: Conference Paper
Times cited : (6)

References (4)
  • 1
    • 0030408129 scopus 로고    scopus 로고
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    • Starner, T.1
  • 2
    • 39749175702 scopus 로고    scopus 로고
    • A 46% Efficient 0.8dBm Transmitter for Wireless Sensor Networks
    • Honolulu, June
    • Y. H. Che, A. M. Niknejad and J. Rabaesy, "A 46% Efficient 0.8dBm Transmitter for Wireless Sensor Networks", Proc. IEEE Symp. VLSI Circuits, Honolulu, June 2006, pp. 52-53.
    • (2006) Proc. IEEE Symp. VLSI Circuits , pp. 52-53
    • Che, Y.H.1    Niknejad, A.M.2    Rabaesy, J.3
  • 3
    • 27544488867 scopus 로고    scopus 로고
    • Wafer-level integration technology of surface mount devices using automatic parts alignment technology with vibration
    • Seoul, pp
    • M. Sudou, H. Takao, K. Sawada, M. Ishida, "Wafer-level integration technology of surface mount devices using automatic parts alignment technology with vibration", Proc. Transducers'05, Seoul, pp.1322-1325, 2005.
    • (2005) Proc. Transducers'05 , pp. 1322-1325
    • Sudou, M.1    Takao, H.2    Sawada, K.3    Ishida, M.4
  • 4
    • 0016961262 scopus 로고
    • On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique
    • J. F. Dickson, "On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique", IEEE J. Solid-State Circuits, vol. 11, pp. 374-378, 1976.
    • (1976) IEEE J. Solid-State Circuits , vol.11 , pp. 374-378
    • Dickson, J.F.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.