SCOPUS 정보 검색 플랫폼

2007 IEEE North-East Workshop on Circuits and Systems, NEWCAS 2007

Volumn , Issue , 2007, Pages 506-509

Fast true random generator in FPGAs

(3) Danger, Jean Luc a Guilley, Sylvain a Hoogvorst, Philippe a

a INSTITUT TELECOM (France)

Author keywords

[No Author keywords available]

Indexed keywords

CRYPTOGRAPHY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); NUMBER THEORY; PHASE LOCKED LOOPS; QUANTUM CHEMISTRY; RANDOM NUMBER GENERATION;

BIT RATES; IN-FIELD; INTERFERENCE RATE; META-STABLE STATES; OPEN LOOPS; PROPOSED ARCHITECTURES; QUANTUM-KEY-DISTRIBUTION PROTOCOLS; RANDOM NUMBER GENERATORS; RING OSCILLATORS; SECURE COMMUNICATIONS; UNCONDITIONAL SECURITY;

QUANTUM CRYPTOGRAPHY;

EID: 50049084866 PISSN: None EISSN: None Source Type: Conference Proceeding
DOI: 10.1109/NEWCAS.2007.4487970 Document Type: Conference Paper

Times cited : (21)

References (9)

1
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- Design of an on-chip random number generator using metastability
- D. Kinniment and E. Chester. Design of an on-chip random number generator using metastability. In Proceedings of the 28th European Solid-State Circuit Conference., 2002.
- (2002) Proceedings of the 28th European Solid-State Circuit Conference
- Kinniment, D.¹ Chester, E.²

2
- 13244264217
- True Random Number Generator Embedded in Reconfigurable Hardware
- M. D. V. Fischer. True Random Number Generator Embedded in Reconfigurable Hardware. In Proc. the 4th International Workshop on Cryptographic Hardware and Embedded Systems, 2002.
- (2002) Proc. the 4th International Workshop on Cryptographic Hardware and Embedded Systems
- Fischer, M.D.V.¹

3
- 2442532948
- An embedded true random number generator for FPGAs
- K. G. P. Kohlbrenner. An embedded true random number generator for FPGAs. In Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays, 2004.
- (2004) Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
- Kohlbrenner, K.G.P.¹

4
- 50049090011
- K. Jun, B. The Intel Random Number Generator. 1999. http://www. cryptography.com/intelRNG.pdf.
- K. Jun, B. The Intel Random Number Generator. 1999. http://www. cryptography.com/intelRNG.pdf.

5
- 50049097440
- NIST. NIST Random Number Generation and Testing, 2006. http://csrc.nist.gov/rng/.
- (2006) Number Generation and Testing

6
- 0019009609
- The behavior of flip-flops used as synchronizers and prediction of their failure rate
- H. J. Veendrick. The behavior of flip-flops used as synchronizers and prediction of their failure rate. IEEE Journal of Solid-State Circuits, 15:169-176, 1980.
- (1980) IEEE Journal of Solid-State Circuits , vol.15 , pp. 169-176
- Veendrick, H.J.¹

7
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- L.-S.: Dutton. Metastability of CMOS latch/flip-flop
- Aug
- R. Kim, L.-S.: Dutton. Metastability of CMOS latch/flip-flop. IEEE Journal of Solid-State Circuits, 25:942-951, Aug 1990.
- (1990) IEEE Journal of Solid-State Circuits , vol.25 , pp. 942-951
- Kim, R.¹

8
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- Altera. Metastability in Altera Devices, http://www.altera.com/ literature/an/an042.pdf.
- Metastability in Altera Devices

9
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- Altera. Stratix Handbook, http://www.altera.com/literature/hb/stx/ stratix_handbook.pdf.
- Stratix Handbook

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.