A discrete time quad-band GSM/GPRS receiver in a 90nm digital CMOS process

Proceedings of the Custom Integrated Circuits Conference

Volumn 2005, Issue , 2005, Pages 809-812

  Muhammad, K ^a   Ho, Y C ^a   Mayhugh, T ^a   Hung, C M ^a   Jung, T ^a   Elahi, I ^a   Lin, C ^a   Deng, I ^a   Fernando, C ^a   Wallberg, J ^a   Vemulapalli, S ^a   Larson, S ^a   Murphy, T ^a   Leipold, D ^a   Cruise, P ^a   Jaehnig, J ^a   Lee, M C ^a   Staszewski, R B ^a   Staszewski, R ^a   Maggio, K ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; PHASE LOCKED LOOPS; SIGNAL FILTERING AND PREDICTION; TRANSMITTERS;

ANALOG SIGNAL PROCESSING; CMOS PROCESS; POWER MANAGEMENT; QUADBAND RECEIVERS;

TRANSCEIVERS;

EID: 33847153075     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2005.1568792     Document Type: Conference Paper

References (8)

1. K. Muhammad et al., "Discrete-time Bluetooth Receiver in 0.13 um Digital CMOS Process," ISSCC Digest of Technical Papers, pp. 268-269, Feb. 2004.
2. R. B. Staszewski, K. Muhammad, D. Leipold, et al., "All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS," IEEE Journal of Solid-State Circuits, vol. 39, iss. 12, pp. 2278-2291, Dec. 2004.
3. R. B. Staszewski, J. Wallberg, S. Rezeq, et al., "All-digital PLL and GSM/EDGE transmitter in 90nm CMOS," ISSCC Digest of Technical Papers, sec. 17.5, pp. 316-317, 600, Feb. 2005.
4. K. Muhammad and R. B. Staszewski, "Direct RF sampling mixer with recursive filtering in charge domain," Proceedings of the 2004 International Symposium on Circuits and Systems (ISCAS '04), Vol. 1, pp. 577-580, May 2004.
5. I. Elahi, K. Muhammad and P. T. Balsara, "I/Q Mismatch Compensation in a low-IF Receiver in 90nm CMOS Process," ISSCC Digest of Technical Papers, Vol. 48, pp. 542-543, Feb. 2005.
6. P. Orsatti, F. Piazza and Q. Huang, "A 20-mA-Receive, 55-mA-Transmit, Single-Chip GSM Transceiver in 0.25um CMOS," IEEE JSSC, Vol. 34, No. 12, pp 1869-1880, Dec. 1999.
7. S. Tadjpour, E. Cijvat, E. Hegazi and A. Abidi, "A 900 MHz dual conversion low-IF GSM receiver in 0.35um CMOS," ISSCC Digest of Technical Papers, pp. 292-293, Feb. 2001.
8. J. Ryynanen et al., "A dual-band front-end for WCDMA and GSM applications," IEEE Journal of Solid-State Circuits, Vol. 36, No. 8, pp. 1198-1204, Aug. 2001.