A 58mW 1.2mm2 HSDPA turbo decoder ASIC in 0.13μm CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages 263-265

  Benkeser, Christian ^a   Burg, Andreas ^a   Cupaiuolo, Teo ^a   Huang, Qiuting ^a,b  

^a ETH ZURICH   (Switzerland)

^b Advanced Circuit Pursuit AG   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DECODING; ENERGY EFFICIENCY; MOBILE TELECOMMUNICATION SYSTEMS;

DECODING RATES; LOW POWER; TURBO DECODERS;

CMOS INTEGRATED CIRCUITS;

EID: 49549120412     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523158     Document Type: Conference Paper

References (6)

1. Mike Walker, "Next Generation Mobile Networks: Getting it right," Samsung 4G Forum keynote speech, Aug. 2007.
2. C. Martelli, et al., "A 50m W HSDPA Baseband Receiver ASIC with Multimode Digital Front-End,"ISSCC Dig. Tech. Papers, pp. 260-262, Feb. 2007.
3. M. Bickerstaff, et al., "A 24Mb/s Radix-4 LogMAP Turbo Decoder for 3GPP - HSDPAMobile Wireless," ISSCC Dig. Tech. Papers, pp. 150-151, Feb. 2003.
4. M. Bickerstaff, et al., "A Unified Turbo/Viterbi Channel Decoder for 3GPP Mobile Wireless in 0.18μm CMOS", IEEE J. Solid-State Circuits, vol. 37, pp. 1555-1564, Nov. 2002.
5. M.-C. Shin, and I.-C. Park, "SIMD Processor-Based Turbo Decoder Supporting Multiple Third-Generation Wireless Standards," ISSCC Dig. Tech. Papers, pp. 154-155, Feb. 2003.
6. J. Vogt, and A. Finger, "Improving the max-log-MAP Turbo Decoder," IEE Electronic Letters, vol. 36, no. 23, pp. 1937-1939, Nov. 2000.