A 2.6mW 370MHz-to-2.5GHz open-loop quadrature clock generator

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages

  Kim, Kyu Hyoun ^a   Coteus, Paul W ^a   Dreps, Daniel ^b   Kim, Seongwon ^a   Rylov, Sergey V ^a   Friedman, Daniel J ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK GENERATORS; CMOS INVERTERS; CMOS PROCESSING; FREQUENCY RANGING; INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE; OPEN LOOPS;

ELECTRIC CLOCKS; OPTICAL DESIGN;

CLOCKS;

EID: 49549118045     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523255     Document Type: Conference Paper

References (4)

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2. P. Kinget, R. Melville, D. Long and V. Gopinathan, "An Injection Locking Scheme for Precision Quadrature Generation," IEEE J. Solid-State Circuits, vol. 37, no. 7, pp. 845-851, Jul. 2002.
3. K. H. Kim, Y. S. Sohn, C. K. Kim et al., "A 20 GB/s 256 Mb DRAM with an Inductorless Quadrature PLL and a Cascaded Pre-emphasis Transmitter," ISSCC Dig. Tech. Papers, pp. 470-471, Feb. 2005.
4. A. Rezayee and K. Martin, "A Three-Stage Coupled Ring Oscillator with Quadrature Outputs," Proc. IEEE ISCAS, pp. 484-487, May 2001.